mirror of https://gitee.com/openkylin/linux.git
Staging: rtl8187se: remove unused radio frontends
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Bartlomiej Zolnierkiewicz
Greg Kroah-Hartman
parent
5521a513e5
commit
6dc1585fe4
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@ -20,13 +20,9 @@ EXTRA_CFLAGS += -DENABLE_LPS
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rtl8187se-objs := \
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r8180_core.o \
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r8180_sa2400.o \
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r8180_93cx6.o \
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r8180_wx.o \
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r8180_max2820.o \
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r8180_gct.o \
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r8180_rtl8225.o \
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r8180_rtl8255.o \
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r8180_rtl8225z2.o \
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r8185b_init.o \
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r8180_dm.o \
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@ -54,11 +54,7 @@
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//#include <asm/uaccess.h>
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#include "r8180_hw.h"
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#include "r8180.h"
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#include "r8180_sa2400.h" /* PHILIPS Radio frontend */
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#include "r8180_max2820.h" /* MAXIM Radio frontend */
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#include "r8180_gct.h" /* GCT Radio frontend */
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#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
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#include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
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#include "r8180_93cx6.h" /* Card EEPROM */
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#include "r8180_wx.h"
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#include "r8180_dm.h"
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@ -1,296 +0,0 @@
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/*
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This files contains GCT radio frontend programming routines.
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This is part of rtl8180 OpenSource driver
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Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the
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official realtek driver
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Parts of this driver are based on the rtl8180 driver skeleton
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from Patric Schenke & Andres Salomon
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
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Code from Rtw8180 NetBSD driver by David Young has been really useful to
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understand some things and gets some ideas
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Code from rtl8181 project has been useful to me to understand some things.
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Some code from 'Deuce' work
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We want to tanks the Authors of such projects and the Ndiswrapper
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project Authors.
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*/
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#include "r8180.h"
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#include "r8180_hw.h"
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#include "r8180_gct.h"
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//#define DEBUG_GCT
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/* the following experiment are just experiments.
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* this means if you enable them you can have every kind
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* of result, included damage the RF chip, so don't
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* touch them if you don't know what you are doing.
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* In any case, if you do it, do at your own risk
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*/
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//#define GCT_EXPERIMENT1 //improve RX sensivity
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//#define GCT_EXPERIMENT2
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//#define GCT_EXPERIMENT3 //iprove a bit RX signal quality ?
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//#define GCT_EXPERIMENT4 //maybe solve some brokeness with experiment1 ?
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//#define GCT_EXPERIMENT5
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//#define GCT_EXPERIMENT6 //not good
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u32 gct_chan[] = {
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0x0, //dummy channel 0
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0x0, //1
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0x1, //2
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0x2, //3
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0x3, //4
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0x4, //5
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0x5, //6
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0x6, //7
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0x7, //8
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0x8, //9
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0x9, //10
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0xa, //11
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0xb, //12
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0xc, //13
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0xd, //14
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};
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int gct_encode[16] = {
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0, 8, 4, 0xC,
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2, 0xA, 6, 0xE,
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1, 9, 5, 0xD,
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3, 0xB, 7, 0xF
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};
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void gct_rf_stabilize(struct net_device *dev)
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{
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force_pci_posting(dev);
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mdelay(3); //for now use a great value.. we may optimize in future
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}
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void write_gct(struct net_device *dev, u8 adr, u32 data)
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{
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// struct r8180_priv *priv = ieee80211_priv(dev);
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u32 phy_config;
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phy_config = gct_encode[(data & 0xf00) >> 8];
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phy_config |= gct_encode[(data & 0xf0) >> 4 ] << 4;
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phy_config |= gct_encode[(data & 0xf) ] << 8;
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phy_config |= gct_encode[(adr >> 1) & 0xf ] << 12;
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phy_config |= (adr & 1 ) << 16;
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phy_config |= gct_encode[(data & 0xf000)>>12] << 24;
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phy_config |= 0x90000000; // MAC will bang bits to the chip
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write_nic_dword(dev,PHY_CONFIG,phy_config);
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#ifdef DEBUG_GCT
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DMESG("Writing GCT: %x (adr %x)",phy_config,adr);
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#endif
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gct_rf_stabilize(dev);
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}
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void gct_write_phy_antenna(struct net_device *dev,short ch)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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u8 ant;
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ant = GCT_ANTENNA;
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if(priv->antb) /*default antenna is antenna B */
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ant |= BB_ANTENNA_B;
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if(ch == 14)
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ant |= BB_ANTATTEN_CHAN14;
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write_phy(dev,0x10,ant);
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//DMESG("BB antenna %x ",ant);
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}
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void gct_rf_set_chan(struct net_device *dev, short ch)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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u32 txpw = 0xff & priv->chtxpwr[ch];
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u32 chan = gct_chan[ch];
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//write_phy(dev,3,txpw);
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#ifdef DEBUG_GCT
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DMESG("Gct set channel");
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#endif
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/* set TX power */
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write_gct(dev,0x15,0);
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write_gct(dev,6, txpw);
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write_gct(dev,0x15, 0x10);
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write_gct(dev,0x15,0);
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/*set frequency*/
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write_gct(dev,7, 0);
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write_gct(dev,0xB, chan);
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write_gct(dev,7, 0x1000);
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#ifdef DEBUG_GCT
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DMESG("Gct set channel > write phy antenna");
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#endif
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gct_write_phy_antenna(dev,ch);
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}
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void gct_rf_close(struct net_device *dev)
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{
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u32 anaparam;
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anaparam = read_nic_dword(dev,ANAPARAM);
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anaparam &= 0x000fffff;
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anaparam |= 0x3f900000;
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rtl8180_set_anaparam(dev, anaparam);
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write_gct(dev, 0x7, 0);
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write_gct(dev, 0x1f, 0x45);
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write_gct(dev, 0x1f, 0x5);
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write_gct(dev, 0x0, 0x8e4);
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}
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void gct_rf_init(struct net_device *dev)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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//u32 anaparam;
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write_nic_byte(dev,PHY_DELAY,0x6); //this is general
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write_nic_byte(dev,CARRIER_SENSE_COUNTER,0x4c); //this is general
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//DMESG("%x", read_nic_dword(dev,ANAPARAM));
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/* we should set anaparm here*/
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//rtl8180_set_anaparam(dev,anaparam);
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write_gct(dev,0x1f,0);
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write_gct(dev,0x1f,0);
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write_gct(dev,0x1f,0x40);
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write_gct(dev,0x1f,0x60);
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write_gct(dev,0x1f,0x61);
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write_gct(dev,0x1f,0x61);
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write_gct(dev,0x0,0xae4);
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write_gct(dev,0x1f,0x1);
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write_gct(dev,0x1f,0x41);
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write_gct(dev,0x1f,0x61);
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write_gct(dev,0x1,0x1a23);
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write_gct(dev,0x2,0x4971);
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write_gct(dev,0x3,0x41de);
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write_gct(dev,0x4,0x2d80);
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#ifdef GCT_EXPERIMENT1
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//write_gct(dev,0x5,0x6810); // from zydas driver. sens+ but quite slow
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//write_gct(dev,0x5,0x681f); //good+ (somewhat stable, better sens, performance decent)
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write_gct(dev,0x5,0x685f); //good performances, not sure sens is really so beeter
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//write_gct(dev,0x5,0x687f); //good performances, maybe sens is not improved
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//write_gct(dev,0x5,0x689f); //like above
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//write_gct(dev,0x5,0x685e); //bad
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//write_gct(dev,0x5,0x68ff); //good+ (somewhat stable, better sens(?), performance decent)
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//write_gct(dev,0x5,0x68f0); //bad
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//write_gct(dev,0x5,0x6cff); //sens+ but not so good
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//write_gct(dev,0x5,0x6dff); //sens+,apparentely very good but broken
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//write_gct(dev,0x5,0x65ff); //sens+,good
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//write_gct(dev,0x5,0x78ff); //sens + but almost broken
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//write_gct(dev,0x5,0x7810); //- //snes + but broken
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//write_gct(dev,0x5,0x781f); //-- //sens +
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//write_gct(dev,0x5,0x78f0); //low sens
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#else
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write_gct(dev,0x5,0x61ff); //best performance but weak sensitivity
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#endif
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#ifdef GCT_EXPERIMENT2
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write_gct(dev,0x6,0xe);
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#else
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write_gct(dev,0x6,0x0);
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#endif
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write_gct(dev,0x7,0x0);
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write_gct(dev,0x8,0x7533);
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write_gct(dev,0x9,0xc401);
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write_gct(dev,0xa,0x0);
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write_gct(dev,0xc,0x1c7);
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write_gct(dev,0xd,0x29d3);
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write_gct(dev,0xe,0x2e8);
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write_gct(dev,0x10,0x192);
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#ifdef GCT_EXPERIMENT3
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write_gct(dev,0x11,0x246);
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#else
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write_gct(dev,0x11,0x248);
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#endif
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write_gct(dev,0x12,0x0);
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write_gct(dev,0x13,0x20c4);
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#ifdef GCT_EXPERIMENT4
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write_gct(dev,0x14,0xf488);
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#else
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write_gct(dev,0x14,0xf4fc);
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#endif
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#ifdef GCT_EXPERIMENT5
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write_gct(dev,0x15,0xb152);
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#else
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write_gct(dev,0x15,0x0);
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#endif
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#ifdef GCT_EXPERIMENT6
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write_gct(dev,0x1e,0x1);
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#endif
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write_gct(dev,0x16,0x1500);
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write_gct(dev,0x7,0x1000);
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/*write_gct(dev,0x15,0x0);
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write_gct(dev,0x6,0x15);
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write_gct(dev,0x15,0x8);
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write_gct(dev,0x15,0x0);
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*/
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write_phy(dev,0,0xa8);
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/* write_gct(dev,0x15,0x0);
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write_gct(dev,0x6,0x12);
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write_gct(dev,0x15,0x8);
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write_gct(dev,0x15,0x0);
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*/
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write_phy(dev,3,0x0);
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write_phy(dev,4,0xc0); /* lna det*/
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write_phy(dev,5,0x90);
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write_phy(dev,6,0x1e);
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write_phy(dev,7,0x64);
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#ifdef DEBUG_GCT
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DMESG("Gct init> write phy antenna");
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#endif
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gct_write_phy_antenna(dev,priv->chan);
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write_phy(dev,0x11,0x88);
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if(!priv->diversity)
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write_phy(dev,0x12,0xc0);
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else
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write_phy(dev,0x12,0x40);
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write_phy(dev,0x13,0x90 | priv->cs_treshold );
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write_phy(dev,0x19,0x0);
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write_phy(dev,0x1a,0xa0);
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write_phy(dev,0x1b,0x44);
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#ifdef DEBUG_GCT
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DMESG("Gct init > set channel2");
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#endif
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gct_rf_set_chan(dev,priv->chan);
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}
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@ -1,25 +0,0 @@
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/*
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This is part of rtl8180 OpenSource driver - v 0.20
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Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the official realtek driver
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Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
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We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
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*/
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#define GCT_ANTENNA 0xA3
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// we use the untouched eeprom value- cross your finger ;-)
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#define GCT_ANAPARAM_PWR1_ON ??
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#define GCT_ANAPARAM_PWR0_ON ??
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void gct_rf_init(struct net_device *dev);
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void gct_rf_set_chan(struct net_device *dev,short ch);
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void gct_rf_close(struct net_device *dev);
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@ -1,171 +0,0 @@
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/*
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This files contains MAXIM MAX2820 radio frontend programming routines.
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This is part of rtl8180 OpenSource driver
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Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the
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official realtek driver
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Parts of this driver are based on the rtl8180 driver skeleton
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from Patric Schenke & Andres Salomon
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
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NetBSD rtl8180 driver from Dave Young has been really useful to
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understand how to program the MAXIM radio. Thanks a lot!!!
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'The Deuce' tested this and fixed some bugs.
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Code from rtl8181 project has been useful to me to understand some things.
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We want to tanks the Authors of such projects and the Ndiswrapper
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project Authors.
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*/
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#include "r8180.h"
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#include "r8180_hw.h"
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#include "r8180_max2820.h"
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//#define DEBUG_MAXIM
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u32 maxim_chan[] = {
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0, //dummy channel 0
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12, //1
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17, //2
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22, //3
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27, //4
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32, //5
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37, //6
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42, //7
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47, //8
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52, //9
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57, //10
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62, //11
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67, //12
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72, //13
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84, //14
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};
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void write_maxim(struct net_device *dev,u8 adr, u32 data) {
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u32 temp;
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temp = 0x90 + (data & 0xf);
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temp <<= 16;
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temp += adr;
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temp <<= 8;
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temp += (data >> 4) & 0xff;
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#ifdef DEBUG_MAXIM
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DMESG("write_maxim: %08x", temp);
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#endif
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write_nic_dword(dev, PHY_CONFIG, temp);
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force_pci_posting(dev);
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mdelay(1);
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}
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void maxim_write_phy_antenna(struct net_device *dev,short ch)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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u8 ant;
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ant = MAXIM_ANTENNA;
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if(priv->antb) /*default antenna is antenna B */
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ant |= BB_ANTENNA_B;
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if(ch == 14)
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ant |= BB_ANTATTEN_CHAN14;
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write_phy(dev,0x10,ant);
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//DMESG("BB antenna %x ",ant);
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}
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void maxim_rf_set_chan(struct net_device *dev, short ch)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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u32 txpw = 0xff & priv->chtxpwr[ch];
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u32 chan = maxim_chan[ch];
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/*While philips SA2400 drive the PA bias
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*seems that for MAXIM we delegate this
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*to the BB
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*/
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//write_maxim(dev,5,txpw);
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write_phy(dev,3,txpw);
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maxim_write_phy_antenna(dev,ch);
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write_maxim(dev,3,chan);
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}
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void maxim_rf_close(struct net_device *dev)
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{
|
||||
write_phy(dev, 3, 0x8);
|
||||
write_maxim(dev, 1, 0);
|
||||
}
|
||||
|
||||
|
||||
void maxim_rf_init(struct net_device *dev)
|
||||
{
|
||||
struct r8180_priv *priv = ieee80211_priv(dev);
|
||||
u32 anaparam;
|
||||
|
||||
write_nic_byte(dev,PHY_DELAY,0x6); //this is general
|
||||
write_nic_byte(dev,CARRIER_SENSE_COUNTER,0x4c); //this is general
|
||||
|
||||
/*these are maxim specific*/
|
||||
anaparam = read_nic_dword(dev,ANAPARAM);
|
||||
anaparam = anaparam &~ (ANAPARAM_TXDACOFF_SHIFT);
|
||||
anaparam = anaparam &~ANAPARAM_PWR1_MASK;
|
||||
anaparam = anaparam &~ANAPARAM_PWR0_MASK;
|
||||
anaparam |= (MAXIM_ANAPARAM_PWR1_ON<<ANAPARAM_PWR1_SHIFT);
|
||||
anaparam |= (MAXIM_ANAPARAM_PWR0_ON<<ANAPARAM_PWR0_SHIFT);
|
||||
|
||||
//rtl8180_set_anaparam(dev,anaparam);
|
||||
|
||||
/* MAXIM from netbsd driver */
|
||||
|
||||
write_maxim(dev,0, 7); /* test mode as indicated in datasheet*/
|
||||
write_maxim(dev,1, 0x1e); /* enable register*/
|
||||
write_maxim(dev,2, 1); /* synt register */
|
||||
|
||||
|
||||
maxim_rf_set_chan(dev,priv->chan);
|
||||
|
||||
write_maxim(dev,4, 0x313); /* rx register*/
|
||||
|
||||
/* PA is driven directly by the BB, we keep the MAXIM bias
|
||||
* at the highest value in the boubt tha pleacing it to lower
|
||||
* values may introduce some further attenuation somewhere..
|
||||
*/
|
||||
|
||||
write_maxim(dev,5, 0xf);
|
||||
|
||||
|
||||
/*baseband configuration*/
|
||||
write_phy(dev,0,0x88); //sys1
|
||||
write_phy(dev,3,0x8); //txagc
|
||||
write_phy(dev,4,0xf8); // lnadet
|
||||
write_phy(dev,5,0x90); // ifagcinit
|
||||
write_phy(dev,6,0x1a); // ifagclimit
|
||||
write_phy(dev,7,0x64); // ifagcdet
|
||||
|
||||
/*Should be done something more here??*/
|
||||
|
||||
maxim_write_phy_antenna(dev,priv->chan);
|
||||
|
||||
write_phy(dev,0x11,0x88); //trl
|
||||
if(priv->diversity)
|
||||
write_phy(dev,0x12,0xc7);
|
||||
else
|
||||
write_phy(dev,0x12,0x47);
|
||||
|
||||
write_phy(dev,0x13,0x9b);
|
||||
|
||||
write_phy(dev,0x19,0x0); //CHESTLIM
|
||||
write_phy(dev,0x1a,0x9f); //CHSQLIM
|
||||
|
||||
maxim_rf_set_chan(dev,priv->chan);
|
||||
}
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
/*
|
||||
This is part of rtl8180 OpenSource driver
|
||||
Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
|
||||
Released under the terms of GPL (General Public Licence)
|
||||
|
||||
Parts of this driver are based on the GPL part of the official realtek driver
|
||||
Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
|
||||
Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
|
||||
|
||||
We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
|
||||
*/
|
||||
|
||||
#define MAXIM_ANTENNA 0xb3
|
||||
#define MAXIM_ANAPARAM_PWR1_ON 0x8
|
||||
#define MAXIM_ANAPARAM_PWR0_ON 0x0
|
||||
|
||||
|
||||
void maxim_rf_init(struct net_device *dev);
|
||||
void maxim_rf_set_chan(struct net_device *dev,short ch);
|
||||
|
||||
void maxim_rf_close(struct net_device *dev);
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,19 +0,0 @@
|
|||
/*
|
||||
This is part of the rtl8180-sa2400 driver
|
||||
released under the GPL (See file COPYING for details).
|
||||
Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
|
||||
|
||||
This files contains programming code for the rtl8255
|
||||
radio frontend.
|
||||
|
||||
*Many* thanks to Realtek Corp. for their great support!
|
||||
|
||||
*/
|
||||
|
||||
#define RTL8255_ANAPARAM_ON 0xa0000b59
|
||||
#define RTL8255_ANAPARAM2_ON 0x840cf311
|
||||
|
||||
|
||||
void rtl8255_rf_init(struct net_device *dev);
|
||||
void rtl8255_rf_set_chan(struct net_device *dev,short ch);
|
||||
void rtl8255_rf_close(struct net_device *dev);
|
||||
|
|
@ -1,233 +0,0 @@
|
|||
/*
|
||||
This files contains PHILIPS SA2400 radio frontend programming routines.
|
||||
|
||||
This is part of rtl8180 OpenSource driver
|
||||
Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
|
||||
Released under the terms of GPL (General Public Licence)
|
||||
|
||||
Parts of this driver are based on the GPL part of the
|
||||
official realtek driver
|
||||
|
||||
Parts of this driver are based on the rtl8180 driver skeleton
|
||||
from Patric Schenke & Andres Salomon
|
||||
|
||||
Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
|
||||
|
||||
Code at http://che.ojctech.com/~dyoung/rtw/ has been useful to me to
|
||||
understand some things.
|
||||
|
||||
Code from rtl8181 project has been useful to me to understand some things.
|
||||
|
||||
We want to tanks the Authors of such projects and the Ndiswrapper
|
||||
project Authors.
|
||||
*/
|
||||
|
||||
|
||||
#include "r8180.h"
|
||||
#include "r8180_hw.h"
|
||||
#include "r8180_sa2400.h"
|
||||
|
||||
|
||||
//#define DEBUG_SA2400
|
||||
|
||||
u32 sa2400_chan[] = {
|
||||
0x0, //dummy channel 0
|
||||
0x00096c, //1
|
||||
0x080970, //2
|
||||
0x100974, //3
|
||||
0x180978, //4
|
||||
0x000980, //5
|
||||
0x080984, //6
|
||||
0x100988, //7
|
||||
0x18098c, //8
|
||||
0x000994, //9
|
||||
0x080998, //10
|
||||
0x10099c, //11
|
||||
0x1809a0, //12
|
||||
0x0009a8, //13
|
||||
0x0009b4, //14
|
||||
};
|
||||
|
||||
|
||||
void rf_stabilize(struct net_device *dev)
|
||||
{
|
||||
force_pci_posting(dev);
|
||||
mdelay(3); //for now use a great value.. we may optimize in future
|
||||
}
|
||||
|
||||
|
||||
void write_sa2400(struct net_device *dev,u8 adr, u32 data)
|
||||
{
|
||||
// struct r8180_priv *priv = ieee80211_priv(dev);
|
||||
u32 phy_config;
|
||||
|
||||
// philips sa2400 expects 24 bits data
|
||||
|
||||
/*if(adr == 4 && priv->digphy){
|
||||
phy_config=0x60000000;
|
||||
}else{
|
||||
phy_config=0xb0000000;
|
||||
}*/
|
||||
|
||||
phy_config = 0xb0000000; // MAC will bang bits to the sa2400
|
||||
|
||||
phy_config |= (((u32)(adr&0xf))<< 24);
|
||||
phy_config |= (data & 0xffffff);
|
||||
write_nic_dword(dev,PHY_CONFIG,phy_config);
|
||||
#ifdef DEBUG_SA2400
|
||||
DMESG("Writing sa2400: %x (adr %x)",phy_config,adr);
|
||||
#endif
|
||||
rf_stabilize(dev);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void sa2400_write_phy_antenna(struct net_device *dev,short ch)
|
||||
{
|
||||
struct r8180_priv *priv = ieee80211_priv(dev);
|
||||
u8 ant;
|
||||
|
||||
ant = SA2400_ANTENNA;
|
||||
if(priv->antb) /*default antenna is antenna B */
|
||||
ant |= BB_ANTENNA_B;
|
||||
if(ch == 14)
|
||||
ant |= BB_ANTATTEN_CHAN14;
|
||||
write_phy(dev,0x10,ant);
|
||||
//DMESG("BB antenna %x ",ant);
|
||||
}
|
||||
|
||||
|
||||
/* from the rtl8181 embedded driver */
|
||||
short sa2400_rf_set_sens(struct net_device *dev, short sens)
|
||||
{
|
||||
u8 finetune = 0;
|
||||
if ((sens > 85) || (sens < 54)) return -1;
|
||||
|
||||
write_sa2400(dev,5,0x1dfb | (sens-54) << 15 |(finetune<<20)); // AGC 0xc9dfb
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void sa2400_rf_set_chan(struct net_device *dev, short ch)
|
||||
{
|
||||
struct r8180_priv *priv = ieee80211_priv(dev);
|
||||
u32 txpw = 0xff & priv->chtxpwr[ch];
|
||||
u32 chan = sa2400_chan[ch];
|
||||
|
||||
write_sa2400(dev,7,txpw);
|
||||
//write_phy(dev,0x10,0xd1);
|
||||
sa2400_write_phy_antenna(dev,ch);
|
||||
write_sa2400(dev,0,chan);
|
||||
write_sa2400(dev,1,0xbb50);
|
||||
write_sa2400(dev,2,0x80);
|
||||
write_sa2400(dev,3,0);
|
||||
}
|
||||
|
||||
|
||||
void sa2400_rf_close(struct net_device *dev)
|
||||
{
|
||||
write_sa2400(dev, 4, 0);
|
||||
}
|
||||
|
||||
|
||||
void sa2400_rf_init(struct net_device *dev)
|
||||
{
|
||||
struct r8180_priv *priv = ieee80211_priv(dev);
|
||||
u32 anaparam;
|
||||
u8 firdac;
|
||||
|
||||
write_nic_byte(dev,PHY_DELAY,0x6); //this is general
|
||||
write_nic_byte(dev,CARRIER_SENSE_COUNTER,0x4c); //this is general
|
||||
|
||||
/*these are philips sa2400 specific*/
|
||||
anaparam = read_nic_dword(dev,ANAPARAM);
|
||||
anaparam = anaparam &~ (1<<ANAPARAM_TXDACOFF_SHIFT);
|
||||
|
||||
anaparam = anaparam &~ANAPARAM_PWR1_MASK;
|
||||
anaparam = anaparam &~ANAPARAM_PWR0_MASK;
|
||||
if(priv->digphy){
|
||||
anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON<<ANAPARAM_PWR1_SHIFT);
|
||||
anaparam |= (SA2400_ANAPARAM_PWR0_ON<<ANAPARAM_PWR0_SHIFT);
|
||||
}else{
|
||||
anaparam |= (SA2400_ANA_ANAPARAM_PWR1_ON<<ANAPARAM_PWR1_SHIFT);
|
||||
}
|
||||
|
||||
rtl8180_set_anaparam(dev,anaparam);
|
||||
|
||||
firdac = (priv->digphy) ? (1<<SA2400_REG4_FIRDAC_SHIFT) : 0;
|
||||
write_sa2400(dev,0,sa2400_chan[priv->chan]);
|
||||
write_sa2400(dev,1,0xbb50);
|
||||
write_sa2400(dev,2,0x80);
|
||||
write_sa2400(dev,3,0);
|
||||
write_sa2400(dev,4,0x19340 | firdac);
|
||||
write_sa2400(dev,5,0xc9dfb); // AGC
|
||||
write_sa2400(dev,4,0x19348 | firdac); //calibrates VCO
|
||||
|
||||
if(priv->digphy)
|
||||
write_sa2400(dev,4,0x1938c); /*???*/
|
||||
|
||||
write_sa2400(dev,4,0x19340 | firdac);
|
||||
|
||||
write_sa2400(dev,0,sa2400_chan[priv->chan]);
|
||||
write_sa2400(dev,1,0xbb50);
|
||||
write_sa2400(dev,2,0x80);
|
||||
write_sa2400(dev,3,0);
|
||||
write_sa2400(dev,4,0x19344 | firdac); //calibrates filter
|
||||
|
||||
/* new from rtl8180 embedded driver (rtl8181 project) */
|
||||
write_sa2400(dev,6,0x13ff | (1<<23)); // MANRX
|
||||
write_sa2400(dev,8,0); //VCO
|
||||
|
||||
if(!priv->digphy)
|
||||
{
|
||||
rtl8180_set_anaparam(dev, anaparam | \
|
||||
(1<<ANAPARAM_TXDACOFF_SHIFT));
|
||||
|
||||
rtl8180_conttx_enable(dev);
|
||||
|
||||
write_sa2400(dev, 4, 0x19341); // calibrates DC
|
||||
|
||||
/* a 5us sleep is required here,
|
||||
we rely on the 3ms delay introduced in write_sa2400
|
||||
*/
|
||||
write_sa2400(dev, 4, 0x19345);
|
||||
/* a 20us sleep is required here,
|
||||
we rely on the 3ms delay introduced in write_sa2400
|
||||
*/
|
||||
rtl8180_conttx_disable(dev);
|
||||
|
||||
rtl8180_set_anaparam(dev, anaparam);
|
||||
}
|
||||
/* end new */
|
||||
|
||||
write_sa2400(dev,4,0x19341 | firdac ); //RTX MODE
|
||||
|
||||
// Set tx power level !?
|
||||
|
||||
|
||||
/*baseband configuration*/
|
||||
write_phy(dev,0,0x98);
|
||||
write_phy(dev,3,0x38);
|
||||
write_phy(dev,4,0xe0);
|
||||
write_phy(dev,5,0x90);
|
||||
write_phy(dev,6,0x1a);
|
||||
write_phy(dev,7,0x64);
|
||||
|
||||
/*Should be done something more here??*/
|
||||
|
||||
sa2400_write_phy_antenna(dev,priv->chan);
|
||||
|
||||
write_phy(dev,0x11,0x80);
|
||||
if(priv->diversity)
|
||||
write_phy(dev,0x12,0xc7);
|
||||
else
|
||||
write_phy(dev,0x12,0x47);
|
||||
|
||||
write_phy(dev,0x13,0x90 | priv->cs_treshold );
|
||||
|
||||
write_phy(dev,0x19,0x0);
|
||||
write_phy(dev,0x1a,0xa0);
|
||||
|
||||
sa2400_rf_set_chan(dev,priv->chan);
|
||||
}
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
/*
|
||||
This is part of rtl8180 OpenSource driver - v 0.7
|
||||
Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
|
||||
Released under the terms of GPL (General Public Licence)
|
||||
|
||||
Parts of this driver are based on the GPL part of the official realtek driver
|
||||
Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
|
||||
Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
|
||||
|
||||
We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
|
||||
*/
|
||||
|
||||
#define SA2400_ANTENNA 0x91
|
||||
#define SA2400_DIG_ANAPARAM_PWR1_ON 0x8
|
||||
#define SA2400_ANA_ANAPARAM_PWR1_ON 0x28
|
||||
#define SA2400_ANAPARAM_PWR0_ON 0x3
|
||||
|
||||
#define SA2400_RF_MAX_SENS 85
|
||||
#define SA2400_RF_DEF_SENS 80
|
||||
|
||||
#define SA2400_REG4_FIRDAC_SHIFT 7
|
||||
|
||||
void sa2400_rf_init(struct net_device *dev);
|
||||
void sa2400_rf_set_chan(struct net_device *dev,short ch);
|
||||
short sa2400_rf_set_sens(struct net_device *dev,short sens);
|
||||
void sa2400_rf_close(struct net_device *dev);
|
||||
|
|
@ -20,7 +20,6 @@
|
|||
|
||||
#include "r8180.h"
|
||||
#include "r8180_hw.h"
|
||||
#include "r8180_sa2400.h"
|
||||
|
||||
#include "ieee80211/dot11d.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -22,11 +22,7 @@ Major Change History:
|
|||
#include <linux/spinlock.h>
|
||||
#include "r8180_hw.h"
|
||||
#include "r8180.h"
|
||||
#include "r8180_sa2400.h" /* PHILIPS Radio frontend */
|
||||
#include "r8180_max2820.h" /* MAXIM Radio frontend */
|
||||
#include "r8180_gct.h" /* GCT Radio frontend */
|
||||
#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
|
||||
#include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
|
||||
#include "r8180_93cx6.h" /* Card EEPROM */
|
||||
#include "r8180_wx.h"
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue