mirror of https://gitee.com/openkylin/linux.git
drm/radeon/cik: use hw defaults for TC_CFG registers
Use the hw power up values rather than 0. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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919cf555c0
commit
6dfa09d7c9
drivers/gpu/drm/radeon
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@ -5353,20 +5353,6 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
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WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT |
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WRITE_PROTECTION_FAULT_ENABLE_DEFAULT);
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/* TC cache setup ??? */
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WREG32(TC_CFG_L1_LOAD_POLICY0, 0);
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WREG32(TC_CFG_L1_LOAD_POLICY1, 0);
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WREG32(TC_CFG_L1_STORE_POLICY, 0);
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WREG32(TC_CFG_L2_LOAD_POLICY0, 0);
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WREG32(TC_CFG_L2_LOAD_POLICY1, 0);
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WREG32(TC_CFG_L2_STORE_POLICY0, 0);
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WREG32(TC_CFG_L2_STORE_POLICY1, 0);
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WREG32(TC_CFG_L2_ATOMIC_POLICY, 0);
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WREG32(TC_CFG_L1_VOLATILE, 0);
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WREG32(TC_CFG_L2_VOLATILE, 0);
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if (rdev->family == CHIP_KAVERI) {
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u32 tmp = RREG32(CHUB_CONTROL);
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tmp &= ~BYPASS_VM;
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