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ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx 

ehrpwm tbclk is wrongly modelled as deriving from dpll_per_m2_ck.
The TRM says tbclk is derived from SYSCLKOUT. SYSCLKOUT nothing but the
functional clock of pwmss (l4ls_gclk).
Fix this by changing source of ehrpwmx_tbclk to l4ls_gclk.

Fixes: 9e100ebafb91: ("Fix ehrpwm tbclk data")
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Vignesh R 2015-02-10 11:05:41 +05:30 committed by Tony Lindgren
parent ac92abcb96
commit 6e22616eba
1 changed files with 3 additions and 3 deletions
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6
arch/arm/boot/dts/am33xx-clocks.dtsi
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@ -99,7 +99,7 @@ rng_fck: rng_fck {
ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 { ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&l4ls_gclk>;
ti,bit-shift = <0>; ti,bit-shift = <0>;
reg = <0x0664>; reg = <0x0664>;
}; };
@ -107,7 +107,7 @@ ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 { ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&l4ls_gclk>;
ti,bit-shift = <1>; ti,bit-shift = <1>;
reg = <0x0664>; reg = <0x0664>;
}; };
@ -115,7 +115,7 @@ ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 { ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,gate-clock"; compatible = "ti,gate-clock";
clocks = <&dpll_per_m2_ck>; clocks = <&l4ls_gclk>;
ti,bit-shift = <2>; ti,bit-shift = <2>;
reg = <0x0664>; reg = <0x0664>;
}; };