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hwmon: (sbtsi) Add documentation 

Document the SB-TSI sensor interface driver.

Signed-off-by: Kun Yi <kunyi@google.com>
Link: https://lore.kernel.org/r/20201211215427.3281681-3-kunyi@google.com
[groeck: Added SPDX license identifier, same as source]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Kun Yi 2020-12-11 13:54:26 -08:00 committed by Guenter Roeck
parent e7bb1a2ab8
commit 6ec3fcf556
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Documentation/hwmon/index.rst
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@ -154,6 +154,7 @@ Hardware Monitoring Kernel Drivers
pwm-fan pwm-fan
q54sj108a2 q54sj108a2
raspberrypi-hwmon raspberrypi-hwmon
sbtsi_temp
sch5627 sch5627
sch5636 sch5636
scpi-hwmon scpi-hwmon

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Documentation/hwmon/sbtsi_temp.rst Normal file
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.. SPDX-License-Identifier: GPL-2.0-or-later
Kernel driver sbtsi_temp
==================
Supported hardware:
* Sideband interface (SBI) Temperature Sensor Interface (SB-TSI)
compliant AMD SoC temperature device.
Prefix: 'sbtsi_temp'
Addresses scanned: This driver doesn't support address scanning.
To instantiate this driver on an AMD CPU with SB-TSI
support, the i2c bus number would be the bus connected from the board
management controller (BMC) to the CPU. The i2c address is specified in
Section 6.3.1 of the SoC register reference: The SB-TSI address is normally
98h for socket 0 and 90h for socket 1, but it could vary based on hardware
address select pins.
Datasheet: The SB-TSI interface and protocol is available as part of
the open source SoC register reference at:
https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
The Advanced Platform Management Link (APML) Specification is
available at:
http://developer.amd.com/wordpress/media/2012/10/41918.pdf
Author: Kun Yi <kunyi@google.com>
Description
-----------
The SBI temperature sensor interface (SB-TSI) is an emulation of the software
and physical interface of a typical 8-pin remote temperature sensor (RTS) on
AMD SoCs. It implements one temperature sensor with readings and limit
registers encode the temperature in increments of 0.125 from 0 to 255.875.
Limits can be set through the writable thresholds, and if reached will trigger
corresponding alert signals.