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dt-bindings: dma: convert arm-pl08x to yaml
Converts dma/arm-pl08x.txt to yaml. In the process, I add an example for the faraday variant. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210430183651.919317-1-clabbe@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Corentin Labbe
Vinod Koul
parent
33f9f3c33e
commit
6f64aa5746
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* ARM PrimeCells PL080 and PL081 and derivatives DMA controller
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Required properties:
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- compatible: "arm,pl080", "arm,primecell";
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"arm,pl081", "arm,primecell";
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"faraday,ftdmac020", "arm,primecell"
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- arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
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in the hardware and must be specified here as <0x0003b080>. This number
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follows the PrimeCell standard numbering using the JEP106 vendor code 0x38
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for Faraday Technology.
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- reg: Address range of the PL08x registers
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- interrupt: The PL08x interrupt number
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- clocks: The clock running the IP core clock
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- clock-names: Must contain "apb_pclk"
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- lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
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- lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs
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- mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents
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- mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents
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- #dma-cells: must be <2>. First cell should contain the DMA request,
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second cell should contain either 1 or 2 depending on
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which AHB master that is used.
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Optional properties:
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- dma-channels: contains the total number of DMA channels supported by the DMAC
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- dma-requests: contains the total number of DMA requests supported by the DMAC
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- memcpy-burst-size: the size of the bursts for memcpy: 1, 4, 8, 16, 32
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64, 128 or 256 bytes are legal values
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- memcpy-bus-width: the bus width used for memcpy in bits: 8, 16 or 32 are legal
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values, the Faraday FTDMAC020 can also accept 64 bits
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Clients
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Required properties:
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- dmas: List of DMA controller phandle, request channel and AHB master id
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- dma-names: Names of the aforementioned requested channels
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Example:
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dmac0: dma-controller@10130000 {
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compatible = "arm,pl080", "arm,primecell";
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reg = <0x10130000 0x1000>;
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interrupt-parent = <&vica>;
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interrupts = <15>;
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clocks = <&hclkdma0>;
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clock-names = "apb_pclk";
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lli-bus-interface-ahb1;
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lli-bus-interface-ahb2;
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mem-bus-interface-ahb2;
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memcpy-burst-size = <256>;
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memcpy-bus-width = <32>;
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#dma-cells = <2>;
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};
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device@40008000 {
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...
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dmas = <&dmac0 0 2
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&dmac0 1 2>;
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dma-names = "tx", "rx";
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...
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};
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@ -0,0 +1,136 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
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maintainers:
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- Vinod Koul <vkoul@kernel.org>
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allOf:
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- $ref: "dma-controller.yaml#"
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# We need a select here so we don't match all nodes with 'arm,primecell'
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select:
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properties:
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compatible:
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contains:
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enum:
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- arm,pl080
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- arm,pl081
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required:
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- compatible
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- arm,pl080
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- arm,pl081
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- const: arm,primecell
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- items:
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- const: faraday,ftdma020
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- const: arm,pl080
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- const: arm,primecell
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reg:
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maxItems: 1
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description: Address range of the PL08x registers
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interrupts:
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minItems: 1
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description: The PL08x interrupt number
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clocks:
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minItems: 1
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description: The clock running the IP core clock
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clock-names:
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maxItems: 1
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lli-bus-interface-ahb1:
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type: boolean
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description: if AHB master 1 is eligible for fetching LLIs
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lli-bus-interface-ahb2:
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type: boolean
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description: if AHB master 2 is eligible for fetching LLIs
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mem-bus-interface-ahb1:
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type: boolean
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description: if AHB master 1 is eligible for fetching memory contents
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mem-bus-interface-ahb2:
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type: boolean
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description: if AHB master 2 is eligible for fetching memory contents
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memcpy-burst-size:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum:
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- 1
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- 4
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- 8
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- 16
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- 32
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- 64
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- 128
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- 256
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description: the size of the bursts for memcpy
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memcpy-bus-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum:
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- 8
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- 16
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- 32
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- 64
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description: bus width used for memcpy in bits. FTDMAC020 also accept 64 bits
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required:
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- reg
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- interrupts
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- clocks
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- clock-names
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- "#dma-cells"
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unevaluatedProperties: false
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examples:
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- |
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dmac0: dma-controller@10130000 {
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compatible = "arm,pl080", "arm,primecell";
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reg = <0x10130000 0x1000>;
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interrupt-parent = <&vica>;
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interrupts = <15>;
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clocks = <&hclkdma0>;
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clock-names = "apb_pclk";
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lli-bus-interface-ahb1;
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lli-bus-interface-ahb2;
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mem-bus-interface-ahb2;
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memcpy-burst-size = <256>;
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memcpy-bus-width = <32>;
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#dma-cells = <2>;
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};
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/reset/cortina,gemini-reset.h>
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#include <dt-bindings/clock/cortina,gemini-clock.h>
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dma-controller@67000000 {
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compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";
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/* Faraday Technology FTDMAC020 variant */
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arm,primecell-periphid = <0x0003b080>;
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reg = <0x67000000 0x1000>;
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interrupts = <9 IRQ_TYPE_EDGE_RISING>;
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resets = <&syscon GEMINI_RESET_DMAC>;
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clocks = <&syscon GEMINI_CLK_AHB>;
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clock-names = "apb_pclk";
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/* Bus interface AHB1 (AHB0) is totally tilted */
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lli-bus-interface-ahb2;
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mem-bus-interface-ahb2;
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memcpy-burst-size = <256>;
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memcpy-bus-width = <32>;
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#dma-cells = <2>;
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};
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