mirror of https://gitee.com/openkylin/linux.git
rtl818x: change misleading names for few register bit definitions
In rtl8180/rtl8187 drivers, few register bit definitions have names of form FOOBAR_SHIFT, suggesting they should be used as shift offset, for example reg |= (1 << ENABLE_FOO_SHIFT). However they are actually defined as (1 << x) and thus they are used (correctly) like reg |= ENABLE_FOO_SHIFT; This patch kills the misleading _SHIFT suffix. Signed-off-by: andrea merello <andrea.merello@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -602,13 +602,13 @@ static int rtl8180_start(struct ieee80211_hw *dev)
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if (priv->r8185) {
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reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
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reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
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reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
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reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
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reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
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rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
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reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
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reg |= RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
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rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
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@ -785,7 +785,7 @@ static int rtl8187b_init_hw(struct ieee80211_hw *dev)
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rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
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reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
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reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
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reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
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rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
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/* Auto Rate Fallback Register (ARFR): 1M-54M setting */
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@ -943,8 +943,8 @@ static int rtl8187_start(struct ieee80211_hw *dev)
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rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
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reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
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reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
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rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
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@ -986,13 +986,13 @@ static int rtl8187_start(struct ieee80211_hw *dev)
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rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
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reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
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reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
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reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
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reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
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reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
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rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
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reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
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reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
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reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
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rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
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@ -144,9 +144,9 @@ struct rtl818x_csr {
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__le32 HSSI_PARA;
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u8 reserved_13[4];
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u8 TX_AGC_CTL;
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#define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
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#define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
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#define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
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#define RTL818X_TX_AGC_CTL_PERPACKET_GAIN (1 << 0)
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#define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL (1 << 1)
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#define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
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u8 TX_GAIN_CCK;
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u8 TX_GAIN_OFDM;
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u8 TX_ANTENNA;
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@ -158,8 +158,8 @@ struct rtl818x_csr {
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u8 SLOT;
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u8 reserved_16[5];
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u8 CW_CONF;
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#define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
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#define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
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#define RTL818X_CW_CONF_PERPACKET_CW (1 << 0)
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#define RTL818X_CW_CONF_PERPACKET_RETRY (1 << 1)
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u8 CW_VAL;
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u8 RATE_FALLBACK;
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#define RTL818X_RATE_FALLBACK_ENABLE (1 << 7)
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