mirror of https://gitee.com/openkylin/linux.git
ptp: i40e: convert to the 64 bit get/set time methods.
The device appears to use a 64 bit nanoseconds register, and so with this patch the driver should be ready for the year 2038. Compile tested only. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -57,7 +57,7 @@
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* timespec. However, since the registers are 64 bits of nanoseconds, we must
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* convert the result to a timespec before we can return.
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**/
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static void i40e_ptp_read(struct i40e_pf *pf, struct timespec *ts)
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static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts)
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{
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struct i40e_hw *hw = &pf->hw;
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u32 hi, lo;
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@ -69,7 +69,7 @@ static void i40e_ptp_read(struct i40e_pf *pf, struct timespec *ts)
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ns = (((u64)hi) << 32) | lo;
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*ts = ns_to_timespec(ns);
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*ts = ns_to_timespec64(ns);
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}
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/**
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@ -81,10 +81,10 @@ static void i40e_ptp_read(struct i40e_pf *pf, struct timespec *ts)
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* we receive a timespec from the stack, we must convert that timespec into
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* nanoseconds before programming the registers.
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**/
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static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec *ts)
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static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec64 *ts)
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{
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struct i40e_hw *hw = &pf->hw;
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u64 ns = timespec_to_ns(ts);
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u64 ns = timespec64_to_ns(ts);
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/* The timer will not update until the high register is written, so
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* write the low register first.
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@ -159,14 +159,14 @@ static int i40e_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
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struct timespec now, then = ns_to_timespec(delta);
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struct timespec64 now, then = ns_to_timespec64(delta);
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unsigned long flags;
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spin_lock_irqsave(&pf->tmreg_lock, flags);
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i40e_ptp_read(pf, &now);
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now = timespec_add(now, then);
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i40e_ptp_write(pf, (const struct timespec *)&now);
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now = timespec64_add(now, then);
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i40e_ptp_write(pf, (const struct timespec64 *)&now);
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spin_unlock_irqrestore(&pf->tmreg_lock, flags);
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@ -181,7 +181,7 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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* Read the device clock and return the correct value on ns, after converting it
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* into a timespec struct.
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**/
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static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
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static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
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unsigned long flags;
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@ -202,7 +202,7 @@ static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
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* to ns happens in the write function.
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**/
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static int i40e_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec *ts)
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const struct timespec64 *ts)
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{
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struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
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unsigned long flags;
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@ -613,8 +613,8 @@ static long i40e_ptp_create_clock(struct i40e_pf *pf)
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pf->ptp_caps.pps = 0;
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pf->ptp_caps.adjfreq = i40e_ptp_adjfreq;
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pf->ptp_caps.adjtime = i40e_ptp_adjtime;
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pf->ptp_caps.gettime = i40e_ptp_gettime;
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pf->ptp_caps.settime = i40e_ptp_settime;
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pf->ptp_caps.gettime64 = i40e_ptp_gettime;
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pf->ptp_caps.settime64 = i40e_ptp_settime;
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pf->ptp_caps.enable = i40e_ptp_feature_enable;
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/* Attempt to register the clock before enabling the hardware. */
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@ -673,7 +673,7 @@ void i40e_ptp_init(struct i40e_pf *pf)
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dev_err(&pf->pdev->dev, "%s: ptp_clock_register failed\n",
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__func__);
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} else {
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struct timespec ts;
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struct timespec64 ts;
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u32 regval;
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dev_info(&pf->pdev->dev, "%s: added PHC on %s\n", __func__,
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@ -695,7 +695,7 @@ void i40e_ptp_init(struct i40e_pf *pf)
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i40e_ptp_set_timestamp_mode(pf, &pf->tstamp_config);
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/* Set the clock value. */
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ts = ktime_to_timespec(ktime_get_real());
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ts = ktime_to_timespec64(ktime_get_real());
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i40e_ptp_settime(&pf->ptp_caps, &ts);
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}
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}
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