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PCI: Use u8, not int, for PM capability offset
The Power Management Capability (PCI_CAP_ID_PM == 0x01) is defined by PCI and must appear in the 256-byte PCI Configuration Space from 0-0xff. It cannot be in the PCIe Extended Configuration space from 0x100-0xfff, so we only need a u8 to hold its offset. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -249,8 +249,7 @@ struct pci_dev {
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pci_power_t current_state; /* Current operating state. In ACPI-speak,
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this is D0-D3, D0 being fully functional,
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and D3 being off. */
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int pm_cap; /* PM capability offset in the
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configuration space */
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u8 pm_cap; /* PM capability offset */
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unsigned int pme_support:5; /* Bitmask of states from which PME#
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can be generated */
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unsigned int pme_interrupt:1;
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