iwlwifi: cleanup references to 8000 family in NVM code

NVM code is tightly coupled with 8000 family, while
it really refers to extended NVM format introduced
back then. Separate it to a configuration dependent
boolean, and rename defines accordingly.

Signed-off-by: Sara Sharon <sara.sharon@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Sara Sharon 2017-03-22 12:20:40 +02:00 committed by Luca Coelho
parent 6ffe5de35b
commit 7042678dff
8 changed files with 70 additions and 74 deletions

View File

@ -165,7 +165,8 @@ static const struct iwl_tt_params iwl8000_tt_params = {
.default_nvm_file_B_step = DEFAULT_NVM_FILE_FAMILY_8000B, \ .default_nvm_file_B_step = DEFAULT_NVM_FILE_FAMILY_8000B, \
.default_nvm_file_C_step = DEFAULT_NVM_FILE_FAMILY_8000C, \ .default_nvm_file_C_step = DEFAULT_NVM_FILE_FAMILY_8000C, \
.thermal_params = &iwl8000_tt_params, \ .thermal_params = &iwl8000_tt_params, \
.apmg_not_supported = true .apmg_not_supported = true, \
.ext_nvm = true
#define IWL_DEVICE_8000 \ #define IWL_DEVICE_8000 \
IWL_DEVICE_8000_COMMON, \ IWL_DEVICE_8000_COMMON, \

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@ -147,7 +147,8 @@ static const struct iwl_tt_params iwl9000_tt_params = {
.mq_rx_supported = true, \ .mq_rx_supported = true, \
.vht_mu_mimo_supported = true, \ .vht_mu_mimo_supported = true, \
.mac_addr_from_csr = true, \ .mac_addr_from_csr = true, \
.rf_id = true .rf_id = true, \
.ext_nvm = true
const struct iwl_cfg iwl9160_2ac_cfg = { const struct iwl_cfg iwl9160_2ac_cfg = {
.name = "Intel(R) Dual Band Wireless AC 9160", .name = "Intel(R) Dual Band Wireless AC 9160",

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@ -123,7 +123,8 @@ static const struct iwl_ht_params iwl_a000_ht_params = {
.mac_addr_from_csr = true, \ .mac_addr_from_csr = true, \
.use_tfh = true, \ .use_tfh = true, \
.rf_id = true, \ .rf_id = true, \
.gen2 = true .gen2 = true, \
.ext_nvm = true
const struct iwl_cfg iwla000_2ac_cfg_hr = { const struct iwl_cfg iwla000_2ac_cfg_hr = {
.name = "Intel(R) Dual Band Wireless AC a000", .name = "Intel(R) Dual Band Wireless AC a000",

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@ -317,6 +317,7 @@ struct iwl_pwr_tx_backoff {
* @integrated: discrete or integrated * @integrated: discrete or integrated
* @gen2: a000 and on transport operation * @gen2: a000 and on transport operation
* @cdb: CDB support * @cdb: CDB support
* @ext_nvm: extended NVM format
* *
* We enable the driver to be backward compatible wrt. hardware features. * We enable the driver to be backward compatible wrt. hardware features.
* API differences in uCode shouldn't be handled here but through TLVs * API differences in uCode shouldn't be handled here but through TLVs
@ -365,7 +366,8 @@ struct iwl_cfg {
integrated:1, integrated:1,
use_tfh:1, use_tfh:1,
gen2:1, gen2:1,
cdb:1; cdb:1,
ext_nvm:1;
u8 valid_tx_ant; u8 valid_tx_ant;
u8 valid_rx_ant; u8 valid_rx_ant;
u8 non_shared_ant; u8 non_shared_ant;

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@ -79,12 +79,12 @@
#define NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ #define NVM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
#define NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ #define NVM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
#define NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(x) (x & 0xF) #define EXT_NVM_RF_CFG_FLAVOR_MSK(x) ((x) & 0xF)
#define NVM_RF_CFG_DASH_MSK_FAMILY_8000(x) ((x >> 4) & 0xF) #define EXT_NVM_RF_CFG_DASH_MSK(x) (((x) >> 4) & 0xF)
#define NVM_RF_CFG_STEP_MSK_FAMILY_8000(x) ((x >> 8) & 0xF) #define EXT_NVM_RF_CFG_STEP_MSK(x) (((x) >> 8) & 0xF)
#define NVM_RF_CFG_TYPE_MSK_FAMILY_8000(x) ((x >> 12) & 0xFFF) #define EXT_NVM_RF_CFG_TYPE_MSK(x) (((x) >> 12) & 0xFFF)
#define NVM_RF_CFG_TX_ANT_MSK_FAMILY_8000(x) ((x >> 24) & 0xF) #define EXT_NVM_RF_CFG_TX_ANT_MSK(x) (((x) >> 24) & 0xF)
#define NVM_RF_CFG_RX_ANT_MSK_FAMILY_8000(x) ((x >> 28) & 0xF) #define EXT_NVM_RF_CFG_RX_ANT_MSK(x) (((x) >> 28) & 0xF)
/** /**
* DOC: Driver system flows - drv component * DOC: Driver system flows - drv component

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@ -94,30 +94,21 @@ enum wkp_nvm_offsets {
XTAL_CALIB = 0x316 - NVM_CALIB_SECTION XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
}; };
enum family_8000_nvm_offsets { enum ext_nvm_offsets {
/* NVM HW-Section offset (in words) definitions */ /* NVM HW-Section offset (in words) definitions */
HW_ADDR0_WFPM_FAMILY_8000 = 0x12, MAC_ADDRESS_OVERRIDE_EXT_NVM = 1,
HW_ADDR1_WFPM_FAMILY_8000 = 0x16,
HW_ADDR0_PCIE_FAMILY_8000 = 0x8A,
HW_ADDR1_PCIE_FAMILY_8000 = 0x8E,
MAC_ADDRESS_OVERRIDE_FAMILY_8000 = 1,
/* NVM SW-Section offset (in words) definitions */ /* NVM SW-Section offset (in words) definitions */
NVM_SW_SECTION_FAMILY_8000 = 0x1C0, NVM_VERSION_EXT_NVM = 0,
NVM_VERSION_FAMILY_8000 = 0, RADIO_CFG_FAMILY_EXT_NVM = 0,
RADIO_CFG_FAMILY_8000 = 0,
SKU_FAMILY_8000 = 2, SKU_FAMILY_8000 = 2,
N_HW_ADDRS_FAMILY_8000 = 3, N_HW_ADDRS_FAMILY_8000 = 3,
/* NVM REGULATORY -Section offset (in words) definitions */ /* NVM REGULATORY -Section offset (in words) definitions */
NVM_CHANNELS_FAMILY_8000 = 0, NVM_CHANNELS_EXTENDED = 0,
NVM_LAR_OFFSET_FAMILY_8000_OLD = 0x4C7, NVM_LAR_OFFSET_OLD = 0x4C7,
NVM_LAR_OFFSET_FAMILY_8000 = 0x507, NVM_LAR_OFFSET = 0x507,
NVM_LAR_ENABLED_FAMILY_8000 = 0x7, NVM_LAR_ENABLED = 0x7,
/* NVM calibration section offset (in words) definitions */
NVM_CALIB_SECTION_FAMILY_8000 = 0x2B8,
XTAL_CALIB_FAMILY_8000 = 0x316 - NVM_CALIB_SECTION_FAMILY_8000
}; };
/* SKU Capabilities (actual values from NVM definition) */ /* SKU Capabilities (actual values from NVM definition) */
@ -141,7 +132,7 @@ static const u8 iwl_nvm_channels[] = {
149, 153, 157, 161, 165 149, 153, 157, 161, 165
}; };
static const u8 iwl_nvm_channels_family_8000[] = { static const u8 iwl_ext_nvm_channels[] = {
/* 2.4 GHz */ /* 2.4 GHz */
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
/* 5 GHz */ /* 5 GHz */
@ -151,9 +142,9 @@ static const u8 iwl_nvm_channels_family_8000[] = {
}; };
#define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels) #define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
#define IWL_NUM_CHANNELS_FAMILY_8000 ARRAY_SIZE(iwl_nvm_channels_family_8000) #define IWL_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels)
#define NUM_2GHZ_CHANNELS 14 #define NUM_2GHZ_CHANNELS 14
#define NUM_2GHZ_CHANNELS_FAMILY_8000 14 #define NUM_2GHZ_CHANNELS_EXT 14
#define FIRST_2GHZ_HT_MINUS 5 #define FIRST_2GHZ_HT_MINUS 5
#define LAST_2GHZ_HT_PLUS 9 #define LAST_2GHZ_HT_PLUS 9
#define LAST_5GHZ_HT 165 #define LAST_5GHZ_HT 165
@ -219,7 +210,7 @@ static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
u32 flags = IEEE80211_CHAN_NO_HT40; u32 flags = IEEE80211_CHAN_NO_HT40;
u32 last_5ghz_ht = LAST_5GHZ_HT; u32 last_5ghz_ht = LAST_5GHZ_HT;
if (cfg->device_family == IWL_DEVICE_FAMILY_8000) if (cfg->ext_nvm)
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000; last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) { if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
@ -273,14 +264,14 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
int num_of_ch, num_2ghz_channels; int num_of_ch, num_2ghz_channels;
const u8 *nvm_chan; const u8 *nvm_chan;
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { if (!cfg->ext_nvm) {
num_of_ch = IWL_NUM_CHANNELS; num_of_ch = IWL_NUM_CHANNELS;
nvm_chan = &iwl_nvm_channels[0]; nvm_chan = &iwl_nvm_channels[0];
num_2ghz_channels = NUM_2GHZ_CHANNELS; num_2ghz_channels = NUM_2GHZ_CHANNELS;
} else { } else {
num_of_ch = IWL_NUM_CHANNELS_FAMILY_8000; num_of_ch = IWL_NUM_CHANNELS_EXT;
nvm_chan = &iwl_nvm_channels_family_8000[0]; nvm_chan = &iwl_ext_nvm_channels[0];
num_2ghz_channels = NUM_2GHZ_CHANNELS_FAMILY_8000; num_2ghz_channels = NUM_2GHZ_CHANNELS_EXT;
} }
for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
@ -479,7 +470,7 @@ IWL_EXPORT_SYMBOL(iwl_init_sbands);
static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw, static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
const __le16 *phy_sku) const __le16 *phy_sku)
{ {
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) if (!cfg->ext_nvm)
return le16_to_cpup(nvm_sw + SKU); return le16_to_cpup(nvm_sw + SKU);
return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000)); return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
@ -487,20 +478,20 @@ static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw) static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
{ {
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) if (!cfg->ext_nvm)
return le16_to_cpup(nvm_sw + NVM_VERSION); return le16_to_cpup(nvm_sw + NVM_VERSION);
else else
return le32_to_cpup((__le32 *)(nvm_sw + return le32_to_cpup((__le32 *)(nvm_sw +
NVM_VERSION_FAMILY_8000)); NVM_VERSION_EXT_NVM));
} }
static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw, static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
const __le16 *phy_sku) const __le16 *phy_sku)
{ {
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) if (!cfg->ext_nvm)
return le16_to_cpup(nvm_sw + RADIO_CFG); return le16_to_cpup(nvm_sw + RADIO_CFG);
return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_8000)); return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
} }
@ -508,7 +499,7 @@ static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
{ {
int n_hw_addr; int n_hw_addr;
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) if (!cfg->ext_nvm)
return le16_to_cpup(nvm_sw + N_HW_ADDRS); return le16_to_cpup(nvm_sw + N_HW_ADDRS);
n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
@ -520,7 +511,7 @@ static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
struct iwl_nvm_data *data, struct iwl_nvm_data *data,
u32 radio_cfg) u32 radio_cfg)
{ {
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { if (!cfg->ext_nvm) {
data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg); data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg); data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg); data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
@ -529,12 +520,12 @@ static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
} }
/* set the radio configuration for family 8000 */ /* set the radio configuration for family 8000 */
data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK_FAMILY_8000(radio_cfg); data->radio_cfg_type = EXT_NVM_RF_CFG_TYPE_MSK(radio_cfg);
data->radio_cfg_step = NVM_RF_CFG_STEP_MSK_FAMILY_8000(radio_cfg); data->radio_cfg_step = EXT_NVM_RF_CFG_STEP_MSK(radio_cfg);
data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK_FAMILY_8000(radio_cfg); data->radio_cfg_dash = EXT_NVM_RF_CFG_DASH_MSK(radio_cfg);
data->radio_cfg_pnum = NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(radio_cfg); data->radio_cfg_pnum = EXT_NVM_RF_CFG_FLAVOR_MSK(radio_cfg);
data->valid_tx_ant = NVM_RF_CFG_TX_ANT_MSK_FAMILY_8000(radio_cfg); data->valid_tx_ant = EXT_NVM_RF_CFG_TX_ANT_MSK(radio_cfg);
data->valid_rx_ant = NVM_RF_CFG_RX_ANT_MSK_FAMILY_8000(radio_cfg); data->valid_rx_ant = EXT_NVM_RF_CFG_RX_ANT_MSK(radio_cfg);
} }
static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest) static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
@ -587,7 +578,7 @@ static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
}; };
hw_addr = (const u8 *)(mac_override + hw_addr = (const u8 *)(mac_override +
MAC_ADDRESS_OVERRIDE_FAMILY_8000); MAC_ADDRESS_OVERRIDE_EXT_NVM);
/* /*
* Store the MAC address from MAO section. * Store the MAC address from MAO section.
@ -629,7 +620,7 @@ static int iwl_set_hw_address(struct iwl_trans *trans,
{ {
if (cfg->mac_addr_from_csr) { if (cfg->mac_addr_from_csr) {
iwl_set_hw_address_from_csr(trans, data); iwl_set_hw_address_from_csr(trans, data);
} else if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { } else if (!cfg->ext_nvm) {
const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR); const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
/* The byte order is little endian 16 bit, meaning 214365 */ /* The byte order is little endian 16 bit, meaning 214365 */
@ -666,7 +657,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
u16 lar_config; u16 lar_config;
const __le16 *ch_section; const __le16 *ch_section;
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) if (!cfg->ext_nvm)
data = kzalloc(sizeof(*data) + data = kzalloc(sizeof(*data) +
sizeof(struct ieee80211_channel) * sizeof(struct ieee80211_channel) *
IWL_NUM_CHANNELS, IWL_NUM_CHANNELS,
@ -674,7 +665,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
else else
data = kzalloc(sizeof(*data) + data = kzalloc(sizeof(*data) +
sizeof(struct ieee80211_channel) * sizeof(struct ieee80211_channel) *
IWL_NUM_CHANNELS_FAMILY_8000, IWL_NUM_CHANNELS_EXT,
GFP_KERNEL); GFP_KERNEL);
if (!data) if (!data)
return NULL; return NULL;
@ -700,7 +691,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw); data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
if (cfg->device_family != IWL_DEVICE_FAMILY_8000) { if (!cfg->ext_nvm) {
/* Checking for required sections */ /* Checking for required sections */
if (!nvm_calib) { if (!nvm_calib) {
IWL_ERR(trans, IWL_ERR(trans,
@ -715,14 +706,14 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
ch_section = &nvm_sw[NVM_CHANNELS]; ch_section = &nvm_sw[NVM_CHANNELS];
} else { } else {
u16 lar_offset = data->nvm_version < 0xE39 ? u16 lar_offset = data->nvm_version < 0xE39 ?
NVM_LAR_OFFSET_FAMILY_8000_OLD : NVM_LAR_OFFSET_OLD :
NVM_LAR_OFFSET_FAMILY_8000; NVM_LAR_OFFSET;
lar_config = le16_to_cpup(regulatory + lar_offset); lar_config = le16_to_cpup(regulatory + lar_offset);
data->lar_enabled = !!(lar_config & data->lar_enabled = !!(lar_config &
NVM_LAR_ENABLED_FAMILY_8000); NVM_LAR_ENABLED);
lar_enabled = data->lar_enabled; lar_enabled = data->lar_enabled;
ch_section = &regulatory[NVM_CHANNELS_FAMILY_8000]; ch_section = &regulatory[NVM_CHANNELS_EXTENDED];
} }
/* If no valid mac address was found - bail out */ /* If no valid mac address was found - bail out */
@ -746,7 +737,7 @@ static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
u32 flags = NL80211_RRF_NO_HT40; u32 flags = NL80211_RRF_NO_HT40;
u32 last_5ghz_ht = LAST_5GHZ_HT; u32 last_5ghz_ht = LAST_5GHZ_HT;
if (cfg->device_family == IWL_DEVICE_FAMILY_8000) if (cfg->ext_nvm)
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000; last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
if (ch_idx < NUM_2GHZ_CHANNELS && if (ch_idx < NUM_2GHZ_CHANNELS &&
@ -793,8 +784,8 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
{ {
int ch_idx; int ch_idx;
u16 ch_flags, prev_ch_flags = 0; u16 ch_flags, prev_ch_flags = 0;
const u8 *nvm_chan = cfg->device_family == IWL_DEVICE_FAMILY_8000 ? const u8 *nvm_chan = cfg->ext_nvm ?
iwl_nvm_channels_family_8000 : iwl_nvm_channels; iwl_ext_nvm_channels : iwl_nvm_channels;
struct ieee80211_regdomain *regd; struct ieee80211_regdomain *regd;
int size_of_regd; int size_of_regd;
struct ieee80211_reg_rule *rule; struct ieee80211_reg_rule *rule;
@ -802,8 +793,8 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
int center_freq, prev_center_freq = 0; int center_freq, prev_center_freq = 0;
int valid_rules = 0; int valid_rules = 0;
bool new_rule; bool new_rule;
int max_num_ch = cfg->device_family == IWL_DEVICE_FAMILY_8000 ? int max_num_ch = cfg->ext_nvm ?
IWL_NUM_CHANNELS_FAMILY_8000 : IWL_NUM_CHANNELS; IWL_NUM_CHANNELS_EXT : IWL_NUM_CHANNELS;
if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES)) if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
return ERR_PTR(-EINVAL); return ERR_PTR(-EINVAL);

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@ -1188,7 +1188,7 @@ static inline bool iwl_mvm_is_lar_supported(struct iwl_mvm *mvm)
* Enable LAR only if it is supported by the FW (TLV) && * Enable LAR only if it is supported by the FW (TLV) &&
* enabled in the NVM * enabled in the NVM
*/ */
if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) if (mvm->cfg->ext_nvm)
return nvm_lar && tlv_lar; return nvm_lar && tlv_lar;
else else
return tlv_lar; return tlv_lar;

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@ -77,7 +77,7 @@
/* Default NVM size to read */ /* Default NVM size to read */
#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024) #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
#define IWL_MAX_NVM_SECTION_SIZE 0x1b58 #define IWL_MAX_NVM_SECTION_SIZE 0x1b58
#define IWL_MAX_NVM_8000_SECTION_SIZE 0x1ffc #define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc
#define NVM_WRITE_OPCODE 1 #define NVM_WRITE_OPCODE 1
#define NVM_READ_OPCODE 0 #define NVM_READ_OPCODE 0
@ -300,7 +300,7 @@ iwl_parse_nvm_sections(struct iwl_mvm *mvm)
bool lar_enabled; bool lar_enabled;
/* Checking for required sections */ /* Checking for required sections */
if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) { if (!mvm->trans->cfg->ext_nvm) {
if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data || if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) { !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n"); IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
@ -391,19 +391,19 @@ int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF)) #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
#define NVM_WORD2_ID(x) (x >> 12) #define NVM_WORD2_ID(x) (x >> 12)
#define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8)) #define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
#define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4) #define EXT_NVM_WORD1_ID(x) ((x) >> 4)
#define NVM_HEADER_0 (0x2A504C54) #define NVM_HEADER_0 (0x2A504C54)
#define NVM_HEADER_1 (0x4E564D2A) #define NVM_HEADER_1 (0x4E564D2A)
#define NVM_HEADER_SIZE (4 * sizeof(u32)) #define NVM_HEADER_SIZE (4 * sizeof(u32))
IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n"); IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
/* Maximal size depends on HW family and step */ /* Maximal size depends on NVM version */
if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) if (!mvm->trans->cfg->ext_nvm)
max_section_size = IWL_MAX_NVM_SECTION_SIZE; max_section_size = IWL_MAX_NVM_SECTION_SIZE;
else else
max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE; max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
/* /*
* Obtain NVM image via request_firmware. Since we already used * Obtain NVM image via request_firmware. Since we already used
@ -472,14 +472,14 @@ int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
break; break;
} }
if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) { if (!mvm->trans->cfg->ext_nvm) {
section_size = section_size =
2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1)); 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2)); section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
} else { } else {
section_size = 2 * NVM_WORD2_LEN_FAMILY_8000( section_size = 2 * EXT_NVM_WORD2_LEN(
le16_to_cpu(file_sec->word2)); le16_to_cpu(file_sec->word2));
section_id = NVM_WORD1_ID_FAMILY_8000( section_id = EXT_NVM_WORD1_ID(
le16_to_cpu(file_sec->word1)); le16_to_cpu(file_sec->word1));
} }
@ -846,7 +846,7 @@ int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
struct ieee80211_regdomain *regd; struct ieee80211_regdomain *regd;
char mcc[3]; char mcc[3];
if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) { if (mvm->cfg->ext_nvm) {
tlv_lar = fw_has_capa(&mvm->fw->ucode_capa, tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
IWL_UCODE_TLV_CAPA_LAR_SUPPORT); IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
nvm_lar = mvm->nvm_data->lar_enabled; nvm_lar = mvm->nvm_data->lar_enabled;