MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation.

Gcc has a tradition of misscompiling the previous construct using the
address of a label as argument to inline assembler.  Gas otoh has the
annoying difference between la and dla which are only usable for 32-bit
rsp. 64-bit code, so can't be used without conditional compilation.
The alterantive is switching the assembler to 64-bit code which happens
to work right even for 32-bit code ...
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2005-12-22 13:41:29 +01:00 committed by
parent 15265251c5
commit 7043ad4f4c
1 changed files with 15 additions and 5 deletions

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@ -233,15 +233,25 @@ __asm__(
#endif
#ifdef CONFIG_CPU_MIPSR2
/*
* gcc has a tradition of misscompiling the previous construct using the
* address of a label as argument to inline assembler. Gas otoh has the
* annoying difference between la and dla which are only usable for 32-bit
* rsp. 64-bit code, so can't be used without conditional compilation.
* The alterantive is switching the assembler to 64-bit code which happens
* to work right even for 32-bit code ...
*/
#define instruction_hazard() \
do { \
__label__ __next; \
unsigned long tmp; \
\
__asm__ __volatile__( \
" .set mips64r2 \n" \
" dla %0, 1f \n" \
" jr.hb %0 \n" \
: \
: "r" (&&__next)); \
__next: \
; \
" .set mips0 \n" \
"1: \n" \
: "=r" (tmp)); \
} while (0)
#else