mirror of https://gitee.com/openkylin/linux.git
drm/radeon: add support for loading new UVD fw
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1679,6 +1679,7 @@ int radeon_pm_get_type_index(struct radeon_device *rdev,
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#define RADEON_UVD_HEAP_SIZE (1024*1024)
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struct radeon_uvd {
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bool fw_header_present;
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struct radeon_bo *vcpu_bo;
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void *cpu_addr;
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uint64_t gpu_addr;
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@ -34,6 +34,7 @@
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#include <drm/drm.h>
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#include "radeon.h"
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#include "radeon_ucode.h"
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#include "r600d.h"
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/* 1 second timeout */
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@ -47,7 +48,8 @@
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#define FIRMWARE_CYPRESS "radeon/CYPRESS_uvd.bin"
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#define FIRMWARE_SUMO "radeon/SUMO_uvd.bin"
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#define FIRMWARE_TAHITI "radeon/TAHITI_uvd.bin"
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#define FIRMWARE_BONAIRE "radeon/BONAIRE_uvd.bin"
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#define FIRMWARE_BONAIRE_LEGACY "radeon/BONAIRE_uvd.bin"
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#define FIRMWARE_BONAIRE "radeon/bonaire_uvd.bin"
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MODULE_FIRMWARE(FIRMWARE_R600);
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MODULE_FIRMWARE(FIRMWARE_RS780);
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@ -56,6 +58,7 @@ MODULE_FIRMWARE(FIRMWARE_RV710);
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MODULE_FIRMWARE(FIRMWARE_CYPRESS);
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MODULE_FIRMWARE(FIRMWARE_SUMO);
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MODULE_FIRMWARE(FIRMWARE_TAHITI);
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MODULE_FIRMWARE(FIRMWARE_BONAIRE_LEGACY);
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MODULE_FIRMWARE(FIRMWARE_BONAIRE);
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static void radeon_uvd_idle_work_handler(struct work_struct *work);
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@ -63,7 +66,7 @@ static void radeon_uvd_idle_work_handler(struct work_struct *work);
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int radeon_uvd_init(struct radeon_device *rdev)
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{
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unsigned long bo_size;
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const char *fw_name;
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const char *fw_name = NULL, *legacy_fw_name = NULL;
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int i, r;
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INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler);
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@ -74,22 +77,22 @@ int radeon_uvd_init(struct radeon_device *rdev)
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case CHIP_RV670:
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case CHIP_RV620:
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case CHIP_RV635:
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fw_name = FIRMWARE_R600;
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legacy_fw_name = FIRMWARE_R600;
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break;
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case CHIP_RS780:
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case CHIP_RS880:
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fw_name = FIRMWARE_RS780;
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legacy_fw_name = FIRMWARE_RS780;
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break;
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case CHIP_RV770:
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fw_name = FIRMWARE_RV770;
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legacy_fw_name = FIRMWARE_RV770;
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break;
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case CHIP_RV710:
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case CHIP_RV730:
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case CHIP_RV740:
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fw_name = FIRMWARE_RV710;
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legacy_fw_name = FIRMWARE_RV710;
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break;
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case CHIP_CYPRESS:
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@ -97,7 +100,7 @@ int radeon_uvd_init(struct radeon_device *rdev)
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case CHIP_JUNIPER:
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case CHIP_REDWOOD:
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case CHIP_CEDAR:
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fw_name = FIRMWARE_CYPRESS;
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legacy_fw_name = FIRMWARE_CYPRESS;
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break;
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case CHIP_SUMO:
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@ -107,7 +110,7 @@ int radeon_uvd_init(struct radeon_device *rdev)
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case CHIP_BARTS:
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case CHIP_TURKS:
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case CHIP_CAICOS:
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fw_name = FIRMWARE_SUMO;
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legacy_fw_name = FIRMWARE_SUMO;
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break;
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case CHIP_TAHITI:
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@ -115,7 +118,7 @@ int radeon_uvd_init(struct radeon_device *rdev)
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case CHIP_PITCAIRN:
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case CHIP_ARUBA:
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case CHIP_OLAND:
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fw_name = FIRMWARE_TAHITI;
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legacy_fw_name = FIRMWARE_TAHITI;
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break;
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case CHIP_BONAIRE:
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@ -123,6 +126,7 @@ int radeon_uvd_init(struct radeon_device *rdev)
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case CHIP_KAVERI:
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case CHIP_HAWAII:
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case CHIP_MULLINS:
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legacy_fw_name = FIRMWARE_BONAIRE_LEGACY;
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fw_name = FIRMWARE_BONAIRE;
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break;
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@ -130,11 +134,34 @@ int radeon_uvd_init(struct radeon_device *rdev)
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return -EINVAL;
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}
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rdev->uvd.fw_header_present = false;
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if (fw_name) {
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/* Let's try to load the newer firmware first */
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r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev);
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if (r) {
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dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n",
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fw_name);
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} else {
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r = radeon_ucode_validate(rdev->uvd_fw);
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if (r)
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return r;
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rdev->uvd.fw_header_present = true;
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}
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}
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/*
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* In case there is only legacy firmware, or we encounter an error
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* while loading the new firmware, we fall back to loading the legacy
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* firmware now.
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*/
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if (!fw_name || r) {
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r = request_firmware(&rdev->uvd_fw, legacy_fw_name, rdev->dev);
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if (r) {
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dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n",
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legacy_fw_name);
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return r;
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}
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}
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bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 8) +
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@ -41,7 +41,13 @@ int uvd_v4_2_resume(struct radeon_device *rdev)
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uint32_t size;
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/* programm the VCPU memory controller bits 0-27 */
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/* skip over the header of the new firmware format */
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if (rdev->uvd.fw_header_present)
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addr = (rdev->uvd.gpu_addr + 0x200) >> 3;
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else
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addr = rdev->uvd.gpu_addr >> 3;
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size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;
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WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
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WREG32(UVD_VCPU_CACHE_SIZE0, size);
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