mirror of https://gitee.com/openkylin/linux.git
avr32: Allow fine-grained control over LCDC pins
This replaces the pin_config param with an u64 pin_mask in at32_add_device_lcdc, allowing a board-maintainer to indivually select specific lcdc pins. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Julien May <jmay@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
Julien May
Haavard Skinnemoen
parent
48c1fd3882
commit
7066412488
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@ -332,7 +332,8 @@ static int __init atstk1002_init(void)
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set_hw_addr(at32_add_device_eth(1, ð_data[1]));
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#else
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at32_add_device_lcdc(0, &atstk1000_lcdc_data,
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fbmem_start, fbmem_size, 0);
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fbmem_start, fbmem_size,
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ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
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#endif
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at32_add_device_usba(0, NULL);
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#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
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@ -140,7 +140,8 @@ static int __init atstk1004_init(void)
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at32_add_device_mci(0, NULL);
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#endif
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at32_add_device_lcdc(0, &atstk1000_lcdc_data,
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fbmem_start, fbmem_size, 0);
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fbmem_start, fbmem_size,
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ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
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at32_add_device_usba(0, NULL);
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#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
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at32_add_device_ssc(0, ATMEL_SSC_TX);
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@ -1353,13 +1353,14 @@ static struct clk atmel_lcdfb0_pixclk = {
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struct platform_device *__init
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at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
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unsigned long fbmem_start, unsigned long fbmem_len,
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unsigned int pin_config)
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u64 pin_mask)
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{
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struct platform_device *pdev;
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struct atmel_lcdfb_info *info;
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struct fb_monspecs *monspecs;
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struct fb_videomode *modedb;
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unsigned int modedb_size;
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int i;
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/*
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* Do a deep copy of the fb data, monspecs and modedb. Make
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@ -1381,75 +1382,29 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
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case 0:
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pdev = &atmel_lcdfb0_device;
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switch (pin_config) {
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case 0:
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select_peripheral(PC(19), PERIPH_A, 0); /* CC */
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select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
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select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
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select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
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select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
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select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
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select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
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select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
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select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
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select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
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select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
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select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
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select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
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select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
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select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
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select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
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select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
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select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
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select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
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select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
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select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
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select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
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select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
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select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
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select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
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select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
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select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
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select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
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select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
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select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
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select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
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break;
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case 1:
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select_peripheral(PE(0), PERIPH_B, 0); /* CC */
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select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
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select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
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select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
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select_peripheral(PE(1), PERIPH_B, 0); /* DVAL */
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select_peripheral(PE(2), PERIPH_B, 0); /* MODE */
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select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
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select_peripheral(PE(3), PERIPH_B, 0); /* DATA0 */
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select_peripheral(PE(4), PERIPH_B, 0); /* DATA1 */
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select_peripheral(PE(5), PERIPH_B, 0); /* DATA2 */
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select_peripheral(PE(6), PERIPH_B, 0); /* DATA3 */
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select_peripheral(PE(7), PERIPH_B, 0); /* DATA4 */
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select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
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select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
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select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
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select_peripheral(PE(8), PERIPH_B, 0); /* DATA8 */
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select_peripheral(PE(9), PERIPH_B, 0); /* DATA9 */
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select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */
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select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */
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select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */
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select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
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select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
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select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
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select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */
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select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */
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select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */
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select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */
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select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */
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select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */
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select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
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select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
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break;
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default:
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goto err_invalid_id;
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if (pin_mask == 0ULL)
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/* Default to "full" lcdc control signals and 24bit */
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pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
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/* LCDC on port C */
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for (i = 19; i < 32; i++) {
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if (pin_mask & (1ULL << i))
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at32_select_periph(GPIO_PIOC_BASE + i,
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GPIO_PERIPH_A, 0);
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}
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/* LCDC on port D */
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for (i = 0; i < 18; i++) {
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if (pin_mask & (1ULL << i))
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at32_select_periph(GPIO_PIOD_BASE + i,
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GPIO_PERIPH_A, 0);
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}
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/* LCDC on port E */
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for (i = 0; i < 19; i++) {
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if (pin_mask & (1ULL << (i + 32)))
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at32_select_periph(GPIO_PIOE_BASE + i,
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GPIO_PERIPH_B, 0);
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}
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clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
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@ -83,4 +83,132 @@
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#define HMATRIX_BASE 0xfff00800
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#define SDRAMC_BASE 0xfff03800
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/* LCDC on port C */
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#define ATMEL_LCDC_PC_CC (1ULL << 19)
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#define ATMEL_LCDC_PC_HSYNC (1ULL << 20)
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#define ATMEL_LCDC_PC_PCLK (1ULL << 21)
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#define ATMEL_LCDC_PC_VSYNC (1ULL << 22)
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#define ATMEL_LCDC_PC_DVAL (1ULL << 23)
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#define ATMEL_LCDC_PC_MODE (1ULL << 24)
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#define ATMEL_LCDC_PC_PWR (1ULL << 25)
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#define ATMEL_LCDC_PC_DATA0 (1ULL << 26)
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#define ATMEL_LCDC_PC_DATA1 (1ULL << 27)
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#define ATMEL_LCDC_PC_DATA2 (1ULL << 28)
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#define ATMEL_LCDC_PC_DATA3 (1ULL << 29)
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#define ATMEL_LCDC_PC_DATA4 (1ULL << 30)
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#define ATMEL_LCDC_PC_DATA5 (1ULL << 31)
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/* LCDC on port D */
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#define ATMEL_LCDC_PD_DATA6 (1ULL << 0)
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#define ATMEL_LCDC_PD_DATA7 (1ULL << 1)
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#define ATMEL_LCDC_PD_DATA8 (1ULL << 2)
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#define ATMEL_LCDC_PD_DATA9 (1ULL << 3)
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#define ATMEL_LCDC_PD_DATA10 (1ULL << 4)
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#define ATMEL_LCDC_PD_DATA11 (1ULL << 5)
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#define ATMEL_LCDC_PD_DATA12 (1ULL << 6)
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#define ATMEL_LCDC_PD_DATA13 (1ULL << 7)
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#define ATMEL_LCDC_PD_DATA14 (1ULL << 8)
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#define ATMEL_LCDC_PD_DATA15 (1ULL << 9)
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#define ATMEL_LCDC_PD_DATA16 (1ULL << 10)
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#define ATMEL_LCDC_PD_DATA17 (1ULL << 11)
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#define ATMEL_LCDC_PD_DATA18 (1ULL << 12)
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#define ATMEL_LCDC_PD_DATA19 (1ULL << 13)
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#define ATMEL_LCDC_PD_DATA20 (1ULL << 14)
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#define ATMEL_LCDC_PD_DATA21 (1ULL << 15)
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#define ATMEL_LCDC_PD_DATA22 (1ULL << 16)
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#define ATMEL_LCDC_PD_DATA23 (1ULL << 17)
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/* LCDC on port E */
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#define ATMEL_LCDC_PE_CC (1ULL << (32 + 0))
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#define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1))
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#define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2))
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#define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3))
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#define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4))
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#define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5))
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#define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6))
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#define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7))
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#define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8))
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#define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9))
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#define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10))
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#define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11))
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#define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12))
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#define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13))
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#define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14))
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#define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15))
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#define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16))
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#define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17))
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#define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18))
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#define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN)
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#define ATMEL_LCDC_PRI_24B_DATA ( \
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ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
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ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
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ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
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ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
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ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
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ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
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ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
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ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
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ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \
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ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
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ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
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ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
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#define ATMEL_LCDC_ALT_24B_DATA ( \
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ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
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ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
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ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
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ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
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ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
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ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
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ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
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ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
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ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \
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ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
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ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
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ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
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#define ATMEL_LCDC_PRI_15B_DATA ( \
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ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
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ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
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ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
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ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
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ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
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ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA16) | \
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ATMEL_LCDC(PD, DATA17) | ATMEL_LCDC(PD, DATA18) | \
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ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20))
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#define ATMEL_LCDC_ALT_15B_DATA ( \
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ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
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ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
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ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
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ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
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ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
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ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PE, DATA16) | \
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ATMEL_LCDC(PE, DATA17) | ATMEL_LCDC(PE, DATA18) | \
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ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20))
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#define ATMEL_LCDC_PRI_CONTROL ( \
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ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \
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ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
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#define ATMEL_LCDC_ALT_CONTROL ( \
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ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \
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ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
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#define ATMEL_LCDC_CONTROL ( \
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ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \
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ATMEL_LCDC(PC, PCLK))
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#define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
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#define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
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#define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
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#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
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#endif /* __ASM_ARCH_AT32AP700X_H__ */
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@ -43,7 +43,7 @@ struct atmel_lcdfb_info;
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struct platform_device *
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at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
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unsigned long fbmem_start, unsigned long fbmem_len,
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unsigned int pin_config);
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u64 pin_mask);
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struct usba_platform_data;
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struct platform_device *
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