mirror of https://gitee.com/openkylin/linux.git
firmware: xilinx: Remove eemi ops for clock set/get parent
Use direct function call instead of eemi ops for clock set/get parent. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-11-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -47,9 +47,8 @@ static u8 zynqmp_clk_mux_get_parent(struct clk_hw *hw)
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u32 clk_id = mux->clk_id;
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u32 val;
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int ret;
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const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
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ret = eemi_ops->clock_getparent(clk_id, &val);
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ret = zynqmp_pm_clock_getparent(clk_id, &val);
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if (ret)
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pr_warn_once("%s() getparent failed for clock: %s, ret = %d\n",
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@ -71,9 +70,8 @@ static int zynqmp_clk_mux_set_parent(struct clk_hw *hw, u8 index)
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const char *clk_name = clk_hw_get_name(hw);
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u32 clk_id = mux->clk_id;
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int ret;
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const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
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ret = eemi_ops->clock_setparent(clk_id, index);
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ret = zynqmp_pm_clock_setparent(clk_id, index);
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if (ret)
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pr_warn_once("%s() set parent failed for clock: %s, ret = %d\n",
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@ -485,11 +485,12 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
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*
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* Return: Returns status, either success or error+reason
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*/
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static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
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int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
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{
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return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
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parent_id, 0, 0, NULL);
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}
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EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
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/**
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* zynqmp_pm_clock_getparent() - Get the clock parent for given id
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@ -501,7 +502,7 @@ static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
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*
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* Return: Returns status, either success or error+reason
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*/
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static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
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int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
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{
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u32 ret_payload[PAYLOAD_ARG_CNT];
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int ret;
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@ -512,6 +513,7 @@ static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
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return ret;
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}
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EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
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/**
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* zynqmp_is_valid_ioctl() - Check whether IOCTL ID is valid or not
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@ -744,8 +746,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
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}
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static const struct zynqmp_eemi_ops eemi_ops = {
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.clock_setparent = zynqmp_pm_clock_setparent,
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.clock_getparent = zynqmp_pm_clock_getparent,
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.ioctl = zynqmp_pm_ioctl,
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.reset_assert = zynqmp_pm_reset_assert,
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.reset_get_status = zynqmp_pm_reset_get_status,
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@ -296,8 +296,6 @@ struct zynqmp_pm_query_data {
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struct zynqmp_eemi_ops {
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int (*fpga_load)(const u64 address, const u32 size, const u32 flags);
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int (*fpga_get_status)(u32 *value);
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int (*clock_setparent)(u32 clock_id, u32 parent_id);
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int (*clock_getparent)(u32 clock_id, u32 *parent_id);
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int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out);
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int (*reset_assert)(const enum zynqmp_pm_reset reset,
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const enum zynqmp_pm_reset_action assert_flag);
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@ -331,6 +329,8 @@ int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider);
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int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider);
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int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate);
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int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate);
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int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id);
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int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id);
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#else
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static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
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{
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@ -377,6 +377,14 @@ static inline int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
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{
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return -ENODEV;
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}
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static inline int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
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{
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return -ENODEV;
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}
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static inline int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
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{
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return -ENODEV;
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}
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#endif
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#endif /* __FIRMWARE_ZYNQMP_H__ */
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