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MIPS: ath79: Don't hardwire cpu_has_dsp{2} to 0
The ath79 code supports various SoCs which are using either a 24Kc or a 74Kc core. The 74Kc core has DSP support, so don't hardwire the values to zero. Commit00dc5ce2a6
(MIPS: ath79: don't hardcode the unavailability of the DSP ASE) has fixed this already, but that change got reverted by475032564e
(MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.) Reported-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5750/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -42,8 +42,6 @@
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_dsp 0
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#define cpu_has_dsp2 0
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#define cpu_has_mipsmt 0
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#define cpu_has_64bits 0
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