mirror of https://gitee.com/openkylin/linux.git
stmmac: pci: split out common_default_data() helper
New helper is added in order to prevent misconfiguration happened for one of the platforms when configuration data is expanded. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -70,11 +70,8 @@ static int stmmac_pci_find_phy_addr(struct stmmac_pci_info *info)
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return -ENODEV;
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}
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static void stmmac_default_data(struct plat_stmmacenet_data *plat)
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static void common_default_data(struct plat_stmmacenet_data *plat)
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{
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plat->bus_id = 1;
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plat->phy_addr = 0;
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plat->interface = PHY_INTERFACE_MODE_GMII;
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plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
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plat->has_gmac = 1;
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plat->force_sf_dma_mode = 1;
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@ -82,10 +79,6 @@ static void stmmac_default_data(struct plat_stmmacenet_data *plat)
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plat->mdio_bus_data->phy_reset = NULL;
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plat->mdio_bus_data->phy_mask = 0;
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plat->dma_cfg->pbl = 32;
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plat->dma_cfg->pblx8 = true;
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/* TODO: AXI */
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/* Set default value for multicast hash bins */
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plat->multicast_filter_bins = HASH_TABLE_SIZE;
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@ -107,12 +100,29 @@ static void stmmac_default_data(struct plat_stmmacenet_data *plat)
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plat->rx_queues_cfg[0].pkt_route = 0x0;
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}
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static void stmmac_default_data(struct plat_stmmacenet_data *plat)
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{
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/* Set common default data first */
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common_default_data(plat);
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plat->bus_id = 1;
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plat->phy_addr = 0;
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plat->interface = PHY_INTERFACE_MODE_GMII;
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plat->dma_cfg->pbl = 32;
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plat->dma_cfg->pblx8 = true;
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/* TODO: AXI */
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}
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static int quark_default_data(struct plat_stmmacenet_data *plat,
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struct stmmac_pci_info *info)
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{
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struct pci_dev *pdev = info->pdev;
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int ret;
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/* Set common default data first */
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common_default_data(plat);
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/*
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* Refuse to load the driver and register net device if MAC controller
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* does not connect to any PHY interface.
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@ -124,38 +134,12 @@ static int quark_default_data(struct plat_stmmacenet_data *plat,
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plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
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plat->phy_addr = ret;
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plat->interface = PHY_INTERFACE_MODE_RMII;
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plat->clk_csr = 2;
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plat->has_gmac = 1;
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plat->force_sf_dma_mode = 1;
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plat->mdio_bus_data->phy_reset = NULL;
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plat->mdio_bus_data->phy_mask = 0;
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plat->dma_cfg->pbl = 16;
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plat->dma_cfg->pblx8 = true;
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plat->dma_cfg->fixed_burst = 1;
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/* AXI (TODO) */
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/* Set default value for multicast hash bins */
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plat->multicast_filter_bins = HASH_TABLE_SIZE;
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/* Set default value for unicast filter entries */
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plat->unicast_filter_entries = 1;
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/* Set the maxmtu to a default of JUMBO_LEN */
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plat->maxmtu = JUMBO_LEN;
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/* Set default number of RX and TX queues to use */
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plat->tx_queues_to_use = 1;
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plat->rx_queues_to_use = 1;
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/* Disable Priority config by default */
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plat->tx_queues_cfg[0].use_prio = false;
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plat->rx_queues_cfg[0].use_prio = false;
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/* Disable RX queues routing by default */
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plat->rx_queues_cfg[0].pkt_route = 0x0;
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return 0;
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}
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