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clk: renesas: Updates for v4.7 (take three)
- Support for CSI2 and VIN module clocks on R-Car H3, - Renesas CPG/MSTP and CPG/MSSR Clock Domain fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXJzqGAAoJEEgEtLw/Ve77c4gP+gIiYF0Zk6qVN9LWW/9ifuIH D9Q0eV1TdhbP/BB4ltQRSozD5tD43f2cr1Hpewn4rqJrr5j19GF/VV2piqkZTWpX 5VP8FDRZxSmlaeA7z1eYNN2AjUKJaBQjQk7/gs5YYAWP5TOposDEnP3KWy0sIEdf 5meErjAbwOkWIAeV26jefG81TUNaCdtRU671hLG3lE4UulYndfFmU04KBAfDCC56 FFRfqfX9zfFKnG59gjOdgAsLYMRsk98AwkHbKjW4aoIBaBPQb5v2YDu2s2jOYn+h E2vD8bItx/orCh3Qr+4mYb15QC5b0jx6/9Yju9x5S7KPplbX/1hzBqfuODn+3O8y lk+oaTQztmPl8tZ8ERDBgayKa2tUVGijsZO/WqUXnYlZBxJ4EVSBxa3DZBd+YmUD zeO1u8S77WA9n46RJ0nf7uzAROccHWQ0byiArQGVTX0jpdnOkjSn2RDKmqyFbQmy tGOOJ8JOiqB+42PWVZMORn2gXwPO0IX7HKapdVwO28iuY5QqJHKJH0mwbMsb7upK Bm4HCxp3pP9atr7mfI6yB7ADUTaj9ozdGUyMMDZgJGIaB4khu9c1gbMup7D7YxZG OhqbfoJvVfh32wqZ/aQgALFP+TNz15bufBa6R2WmqS6LLZZ2sC0pqGkN/0DFqzSN An8YKlCJoq61nOZAja/s =YZUN -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v4.7-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next Pull Renesas clk driver updates from Geert Uytterhoeven: - Support for CSI2 and VIN module clocks on R-Car H3, - Renesas CPG/MSTP and CPG/MSSR Clock Domain fixes. * tag 'clk-renesas-for-v4.7-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: cpg-mssr: Use always-on governor for Clock Domain clk: renesas: cpg-mssr: Postpone call to pm_genpd_init() clk: renesas: mstp: Use always-on governor for Clock Domain clk: renesas: mstp: Postpone call to pm_genpd_init() clk: renesas: r8a7795: Add VIN clocks clk: renesas: r8a7795: Add CSI2 clocks
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commit
71a553cfa6
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@ -316,11 +316,10 @@ void __init cpg_mstp_add_clk_domain(struct device_node *np)
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return;
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pd->name = np->name;
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pd->flags = GENPD_FLAG_PM_CLK;
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pm_genpd_init(pd, &simple_qos_governor, false);
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pd->attach_dev = cpg_mstp_attach_dev;
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pd->detach_dev = cpg_mstp_detach_dev;
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pm_genpd_init(pd, &pm_domain_always_on_gov, false);
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of_genpd_add_provider_simple(np, pd);
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}
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@ -120,6 +120,7 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
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DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014),
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DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV2, 0x250),
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DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
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DEF_DIV6P1("csi0", R8A7795_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
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DEF_DIV6_RO("osc", R8A7795_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
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DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
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@ -190,6 +191,10 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
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DEF_MOD("ehci1", 702, R8A7795_CLK_S3D4),
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DEF_MOD("ehci0", 703, R8A7795_CLK_S3D4),
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DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4),
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DEF_MOD("csi21", 713, R8A7795_CLK_CSI0),
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DEF_MOD("csi20", 714, R8A7795_CLK_CSI0),
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DEF_MOD("csi41", 715, R8A7795_CLK_CSI0),
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DEF_MOD("csi40", 716, R8A7795_CLK_CSI0),
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DEF_MOD("du3", 721, R8A7795_CLK_S2D1),
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DEF_MOD("du2", 722, R8A7795_CLK_S2D1),
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DEF_MOD("du1", 723, R8A7795_CLK_S2D1),
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@ -197,6 +202,14 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
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DEF_MOD("lvds", 727, R8A7795_CLK_S2D1),
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DEF_MOD("hdmi1", 728, R8A7795_CLK_HDMI),
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DEF_MOD("hdmi0", 729, R8A7795_CLK_HDMI),
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DEF_MOD("vin7", 804, R8A7795_CLK_S2D1),
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DEF_MOD("vin6", 805, R8A7795_CLK_S2D1),
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DEF_MOD("vin5", 806, R8A7795_CLK_S2D1),
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DEF_MOD("vin4", 807, R8A7795_CLK_S2D1),
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DEF_MOD("vin3", 808, R8A7795_CLK_S2D1),
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DEF_MOD("vin2", 809, R8A7795_CLK_S2D1),
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DEF_MOD("vin1", 810, R8A7795_CLK_S2D1),
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DEF_MOD("vin0", 811, R8A7795_CLK_S2D1),
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DEF_MOD("etheravb", 812, R8A7795_CLK_S3D2),
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DEF_MOD("sata0", 815, R8A7795_CLK_S3D2),
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DEF_MOD("gpio7", 905, R8A7795_CLK_CP),
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@ -493,9 +493,9 @@ static int __init cpg_mssr_add_clk_domain(struct device *dev,
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genpd = &pd->genpd;
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genpd->name = np->name;
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genpd->flags = GENPD_FLAG_PM_CLK;
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pm_genpd_init(genpd, &simple_qos_governor, false);
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genpd->attach_dev = cpg_mssr_attach_dev;
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genpd->detach_dev = cpg_mssr_detach_dev;
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pm_genpd_init(genpd, &pm_domain_always_on_gov, false);
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cpg_mssr_clk_domain = pd;
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of_genpd_add_provider_simple(np, genpd);
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