mirror of https://gitee.com/openkylin/linux.git
pciehp: remove trailing whitespace from pciehp_hpc.c
Remove trailing whitespaces from pciehp_hpc.c. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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c842648377
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@ -129,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
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/* Link Width Encoding */
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#define LNK_X1 0x01
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#define LNK_X2 0x02
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#define LNK_X4 0x04
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#define LNK_X4 0x04
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#define LNK_X8 0x08
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#define LNK_X12 0x0C
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#define LNK_X16 0x10
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#define LNK_X16 0x10
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#define LNK_X32 0x20
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/*Field definitions of Link Status Register */
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@ -262,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask)
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goto out;
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}
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if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
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if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
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/* After 1 sec and CMD_COMPLETED still not set, just
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proceed forward to issue the next command according
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to spec. Just print out the error message */
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@ -310,7 +310,7 @@ static int hpc_check_lnk_status(struct controller *ctrl)
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}
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dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status);
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if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) ||
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if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) ||
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!(lnk_status & NEG_LINK_WD)) {
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err("%s : Link Training Error occurs \n", __FUNCTION__);
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retval = -1;
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@ -382,7 +382,7 @@ static int hpc_get_power_status(struct slot *slot, u8 *status)
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*status = 1;
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break;
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case 1:
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*status = 0;
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*status = 0;
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break;
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default:
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*status = 0xFF;
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@ -405,7 +405,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status)
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return retval;
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}
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*status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1;
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*status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1;
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return 0;
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}
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@ -441,7 +441,7 @@ static int hpc_query_power_fault(struct slot *slot)
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return retval;
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}
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pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1);
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return pwr_fault;
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}
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@ -509,7 +509,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
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rc = pcie_write_cmd(slot, slot_cmd, cmd_mask);
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dbg("%s: SLOTCTRL %x write cmd %x\n",
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__FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd);
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return rc;
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}
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@ -519,7 +519,7 @@ static void hpc_set_green_led_on(struct slot *slot)
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struct controller *ctrl = slot->ctrl;
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u16 slot_cmd;
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u16 cmd_mask;
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slot_cmd = 0x0100;
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cmd_mask = PWR_LED_CTRL;
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if (!pciehp_poll_mode) {
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@ -556,7 +556,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
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struct controller *ctrl = slot->ctrl;
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u16 slot_cmd;
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u16 cmd_mask;
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slot_cmd = 0x0200;
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cmd_mask = PWR_LED_CTRL;
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if (!pciehp_poll_mode) {
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@ -736,7 +736,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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}
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dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n",
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__FUNCTION__, slot_status);
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/* Clear command complete interrupt caused by this write */
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temp_word = 0x1f;
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rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
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@ -746,10 +746,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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return IRQ_NONE;
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}
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}
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if (intr_loc & CMD_COMPLETED) {
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/*
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* Command Complete Interrupt Pending
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/*
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* Command Complete Interrupt Pending
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*/
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ctrl->cmd_busy = 0;
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wake_up_interruptible(&ctrl->queue);
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@ -803,7 +803,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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__FUNCTION__);
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return IRQ_NONE;
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}
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/* Clear command complete interrupt caused by this write */
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temp_word = 0x1F;
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rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
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@ -815,7 +815,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n",
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__FUNCTION__, temp_word);
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}
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return IRQ_HANDLED;
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}
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@ -936,7 +936,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value
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err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__);
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return retval;
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}
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switch ((lnk_status & 0x03F0) >> 4){
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case 0:
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lnk_wdth = PCIE_LNK_WIDTH_RESRV;
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@ -988,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = {
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.get_cur_bus_speed = hpc_get_cur_lnk_speed,
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.get_max_lnk_width = hpc_get_max_lnk_width,
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.get_cur_lnk_width = hpc_get_cur_lnk_width,
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.query_power_fault = hpc_query_power_fault,
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.green_led_on = hpc_set_green_led_on,
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.green_led_off = hpc_set_green_led_off,
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.green_led_blink = hpc_set_green_led_blink,
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.release_ctlr = hpc_release_ctlr,
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.check_lnk_status = hpc_check_lnk_status,
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};
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@ -1144,7 +1144,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
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(unsigned long long)pci_resource_start(pdev, rc),
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(unsigned long long)pci_resource_len(pdev, rc));
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info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device,
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info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device,
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pdev->subsystem_vendor, pdev->subsystem_device);
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mutex_init(&ctrl->crit_sect);
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@ -1232,14 +1232,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
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if (ATTN_BUTTN(slot_cap))
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intr_enable = intr_enable | ATTN_BUTTN_ENABLE;
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if (POWER_CTRL(slot_cap))
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intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE;
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if (MRL_SENS(slot_cap))
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intr_enable = intr_enable | MRL_DETECT_ENABLE;
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temp_word = (temp_word & ~intr_enable) | intr_enable;
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temp_word = (temp_word & ~intr_enable) | intr_enable;
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if (pciehp_poll_mode) {
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temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0;
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@ -1258,14 +1258,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
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err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__);
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goto abort_disable_intr;
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}
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temp_word = 0x1F; /* Clear all events */
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rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word);
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if (rc) {
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err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__);
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goto abort_disable_intr;
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}
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if (pciehp_force) {
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dbg("Bypassing BIOS check for pciehp use on %s\n",
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pci_name(ctrl->pci_dev));
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