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ARM: dts: DRA7: Enable Timers 13 through 16 

The Timers 13 through 16 have been added previously in
disabled state. These timers are common timers that are
present on all DRA7 family of SoCs, so enable these
devices by default like the rest of the DMTimers.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Suman Anna 2016-04-05 16:44:09 -05:00 committed by Tony Lindgren
parent 296ea972dc
commit 722326c49e
1 changed files with 0 additions and 4 deletions
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4
arch/arm/boot/dts/dra7.dtsi
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@ -826,7 +826,6 @@ timer13: timer@48828000 {
reg = <0x48828000 0x80>;
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer13";
status = "disabled";
};
timer14: timer@4882a000 {
@ -834,7 +833,6 @@ timer14: timer@4882a000 {
reg = <0x4882a000 0x80>;
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer14";
status = "disabled";
};
timer15: timer@4882c000 {
@ -842,7 +840,6 @@ timer15: timer@4882c000 {
reg = <0x4882c000 0x80>;
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer15";
status = "disabled";
};
timer16: timer@4882e000 {
@ -850,7 +847,6 @@ timer16: timer@4882e000 {
reg = <0x4882e000 0x80>;
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer16";
status = "disabled";
};
wdt2: wdt@4ae14000 {