mirror of https://gitee.com/openkylin/linux.git
MIPS: Export some tlbex internals for KVM to use
Export to TLB exception code generating functions so that KVM can construct a fast TLB refill handler for guest context without reinventing the wheel quite so much. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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93a93c2461
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@ -0,0 +1,26 @@
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#ifndef __ASM_TLBEX_H
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#define __ASM_TLBEX_H
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#include <asm/uasm.h>
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/*
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* Write random or indexed TLB entry, and care about the hazards from
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* the preceding mtc0 and for the following eret.
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*/
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enum tlb_write_entry {
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tlb_random,
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tlb_indexed
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};
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extern int pgd_reg;
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void build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
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unsigned int tmp, unsigned int ptr);
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void build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr);
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void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr);
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void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep);
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void build_tlb_write_entry(u32 **p, struct uasm_label **l,
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struct uasm_reloc **r,
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enum tlb_write_entry wmode);
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#endif /* __ASM_TLBEX_H */
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@ -35,6 +35,7 @@
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#include <asm/war.h>
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#include <asm/uasm.h>
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#include <asm/setup.h>
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#include <asm/tlbex.h>
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static int mips_xpa_disabled;
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@ -345,7 +346,8 @@ static int allocate_kscratch(void)
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}
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static int scratch_reg;
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static int pgd_reg;
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int pgd_reg;
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EXPORT_SYMBOL_GPL(pgd_reg);
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enum vmalloc64_mode {not_refill, refill_scratch, refill_noscratch};
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static struct work_registers build_get_work_registers(u32 **p)
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@ -497,15 +499,9 @@ static void __maybe_unused build_tlb_probe_entry(u32 **p)
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}
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}
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/*
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* Write random or indexed TLB entry, and care about the hazards from
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* the preceding mtc0 and for the following eret.
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*/
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enum tlb_write_entry { tlb_random, tlb_indexed };
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static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
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struct uasm_reloc **r,
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enum tlb_write_entry wmode)
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void build_tlb_write_entry(u32 **p, struct uasm_label **l,
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struct uasm_reloc **r,
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enum tlb_write_entry wmode)
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{
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void(*tlbw)(u32 **) = NULL;
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@ -628,6 +624,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
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break;
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}
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}
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EXPORT_SYMBOL_GPL(build_tlb_write_entry);
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static __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
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unsigned int reg)
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@ -782,9 +779,8 @@ static void build_huge_handler_tail(u32 **p, struct uasm_reloc **r,
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* TMP and PTR are scratch.
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* TMP will be clobbered, PTR will hold the pmd entry.
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*/
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static void
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build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
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unsigned int tmp, unsigned int ptr)
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void build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
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unsigned int tmp, unsigned int ptr)
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{
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#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
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long pgdc = (long)pgd_current;
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@ -860,6 +856,7 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
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uasm_i_daddu(p, ptr, ptr, tmp); /* add in pmd offset */
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#endif
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}
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EXPORT_SYMBOL_GPL(build_get_pmde64);
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/*
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* BVADDR is the faulting address, PTR is scratch.
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@ -935,8 +932,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
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* TMP and PTR are scratch.
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* TMP will be clobbered, PTR will hold the pgd entry.
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*/
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static void __maybe_unused
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build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
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void build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
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{
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if (pgd_reg != -1) {
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/* pgd is in pgd_reg */
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@ -961,6 +957,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
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uasm_i_sll(p, tmp, tmp, PGD_T_LOG2);
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uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
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}
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EXPORT_SYMBOL_GPL(build_get_pgde32);
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#endif /* !CONFIG_64BIT */
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@ -990,7 +987,7 @@ static void build_adjust_context(u32 **p, unsigned int ctx)
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uasm_i_andi(p, ctx, ctx, mask);
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}
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static void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
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void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
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{
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/*
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* Bug workaround for the Nevada. It seems as if under certain
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@ -1014,8 +1011,9 @@ static void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
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build_adjust_context(p, tmp);
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UASM_i_ADDU(p, ptr, ptr, tmp); /* add in offset */
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}
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EXPORT_SYMBOL_GPL(build_get_ptep);
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static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
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void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
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{
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int pte_off_even = 0;
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int pte_off_odd = sizeof(pte_t);
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@ -1064,6 +1062,7 @@ static void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep)
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UASM_i_MTC0(p, 0, C0_ENTRYLO1);
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UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */
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}
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EXPORT_SYMBOL_GPL(build_update_entries);
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struct mips_huge_tlb_info {
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int huge_pte;
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