mirror of https://gitee.com/openkylin/linux.git
perf_counter, x86: modify initialization of struct x86_pmu
This patch adds an error handler and changes initialization of struct x86_pmu. No functional changes. Needed for follow-on patches. [ Impact: cleanup ] Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: Paul Mackerras <paulus@samba.org> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <1241002046-8832-14-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -913,7 +913,7 @@ static struct x86_pmu amd_pmu = {
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.max_events = ARRAY_SIZE(amd_perfmon_event_map),
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.max_events = ARRAY_SIZE(amd_perfmon_event_map),
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};
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};
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static struct x86_pmu *intel_pmu_init(void)
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static int intel_pmu_init(void)
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{
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{
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union cpuid10_edx edx;
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union cpuid10_edx edx;
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union cpuid10_eax eax;
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union cpuid10_eax eax;
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@ -921,7 +921,7 @@ static struct x86_pmu *intel_pmu_init(void)
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unsigned int ebx;
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unsigned int ebx;
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if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
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if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
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return NULL;
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return -ENODEV;
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/*
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/*
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* Check whether the Architectural PerfMon supports
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* Check whether the Architectural PerfMon supports
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@ -929,49 +929,54 @@ static struct x86_pmu *intel_pmu_init(void)
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*/
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*/
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cpuid(10, &eax.full, &ebx, &unused, &edx.full);
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cpuid(10, &eax.full, &ebx, &unused, &edx.full);
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if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
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if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
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return NULL;
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return -ENODEV;
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intel_perfmon_version = eax.split.version_id;
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intel_perfmon_version = eax.split.version_id;
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if (intel_perfmon_version < 2)
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if (intel_perfmon_version < 2)
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return NULL;
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return -ENODEV;
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pr_info("Intel Performance Monitoring support detected.\n");
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pr_info("Intel Performance Monitoring support detected.\n");
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pr_info("... version: %d\n", intel_perfmon_version);
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pr_info("... version: %d\n", intel_perfmon_version);
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pr_info("... bit width: %d\n", eax.split.bit_width);
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pr_info("... bit width: %d\n", eax.split.bit_width);
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pr_info("... mask length: %d\n", eax.split.mask_length);
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pr_info("... mask length: %d\n", eax.split.mask_length);
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x86_pmu = &intel_pmu;
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nr_counters_generic = eax.split.num_counters;
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nr_counters_generic = eax.split.num_counters;
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nr_counters_fixed = edx.split.num_counters_fixed;
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nr_counters_fixed = edx.split.num_counters_fixed;
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counter_value_mask = (1ULL << eax.split.bit_width) - 1;
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counter_value_mask = (1ULL << eax.split.bit_width) - 1;
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return &intel_pmu;
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return 0;
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}
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}
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static struct x86_pmu *amd_pmu_init(void)
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static int amd_pmu_init(void)
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{
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{
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x86_pmu = &amd_pmu;
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nr_counters_generic = 4;
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nr_counters_generic = 4;
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nr_counters_fixed = 0;
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nr_counters_fixed = 0;
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counter_value_mask = 0x0000FFFFFFFFFFFFULL;
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counter_value_mask = 0x0000FFFFFFFFFFFFULL;
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counter_value_bits = 48;
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counter_value_bits = 48;
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pr_info("AMD Performance Monitoring support detected.\n");
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pr_info("AMD Performance Monitoring support detected.\n");
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return 0;
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return &amd_pmu;
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}
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}
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void __init init_hw_perf_counters(void)
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void __init init_hw_perf_counters(void)
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{
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{
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int err;
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switch (boot_cpu_data.x86_vendor) {
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_INTEL:
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case X86_VENDOR_INTEL:
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x86_pmu = intel_pmu_init();
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err = intel_pmu_init();
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break;
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break;
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case X86_VENDOR_AMD:
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case X86_VENDOR_AMD:
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x86_pmu = amd_pmu_init();
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err = amd_pmu_init();
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break;
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break;
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default:
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default:
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return;
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return;
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}
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}
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if (!x86_pmu)
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if (err != 0)
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return;
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return;
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pr_info("... num counters: %d\n", nr_counters_generic);
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pr_info("... num counters: %d\n", nr_counters_generic);
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