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x86, perf: Use apic_write unconditionally 

Since apic_write() maps to a plain noop in the !CONFIG_X86_LOCAL_APIC
case we're safe to remove this conditional compilation and clean up
the code a bit.

Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Cc: fweisbec@gmail.com
Cc: acme@redhat.com
Cc: eranian@google.com
Cc: peterz@infradead.org
LKML-Reference: <20100317104356.232371479@openvz.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Cyrill Gorcunov 2010-03-17 13:37:01 +03:00 committed by Ingo Molnar
parent d674cd1963
commit 7335f75e9c
2 changed files with 0 additions and 6 deletions
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4
arch/x86/kernel/cpu/perf_event.c
View File

@ -1136,7 +1136,6 @@ void set_perf_event_pending(void)
void perf_events_lapic_init(void)
{
#ifdef CONFIG_X86_LOCAL_APIC
if (!x86_pmu.apic || !x86_pmu_initialized())
return;
@ -1144,7 +1143,6 @@ void perf_events_lapic_init(void)
* Always use NMI for PMU
*/
apic_write(APIC_LVTPC, APIC_DM_NMI);
#endif
}
static int __kprobes
@ -1168,9 +1166,7 @@ perf_event_nmi_handler(struct notifier_block *self,
regs = args->regs;
#ifdef CONFIG_X86_LOCAL_APIC
apic_write(APIC_LVTPC, APIC_DM_NMI);
#endif
/*
* Can't rely on the handled return value to say it was our NMI, two
* events could trigger 'simultaneously' raising two back-to-back NMIs.

2
arch/x86/kernel/cpu/perf_event_p4.c
View File

@ -363,10 +363,8 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)
}
if (handled) {
#ifdef CONFIG_X86_LOCAL_APIC
/* p4 quirk: unmask it again */
apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
#endif
inc_irq_stat(apic_perf_irqs);
}