mirror of https://gitee.com/openkylin/linux.git
Merge branch 'pm-cpufreq'
Merge cpufreq changes for 4.19. These are driver extensions, some driver and core fixes and a new tracepoint for the tracking of frequency limits changes (coming from Android). * pm-cpufreq: cpufreq: intel_pstate: Ignore turbo active ratio in HWP cpufreq: Fix a circular lock dependency problem cpu/hotplug: Add a cpus_read_trylock() function cpufreq: trace frequency limits change cpufreq: intel_pstate: Show different max frequency with turbo 3 and HWP cpufreq: pcc-cpufreq: Disable dynamic scaling on many-CPU systems cpufreq: qcom-kryo: Silently error out on EPROBE_DEFER cpufreq / CPPC: Add cpuinfo_cur_freq support for CPPC cpufreq: armada-37xx: Add AVS support dt-bindings: marvell: Add documentation for the Armada 3700 AVS binding cpufreq: imx6q/thermal: imx: register cooling device depending on OF cpufreq: intel_pstate: use match_string() helper
This commit is contained in:
Rafael J. Wysocki
commit
7425ecd5e3
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@ -33,3 +33,18 @@ nb_pm: syscon@14000 {
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compatible = "marvell,armada-3700-nb-pm", "syscon";
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reg = <0x14000 0x60>;
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}
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AVS
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---
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For AVS an other component is needed:
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Required properties:
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- compatible : should contain "marvell,armada-3700-avs", "syscon";
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- reg : the register start and length for the AVS
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Example:
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avs: avs@11500 {
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compatible = "marvell,armada-3700-avs", "syscon";
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reg = <0x11500 0x40>;
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}
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@ -27,6 +27,7 @@ cpufreq.
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cpu_idle "state=%lu cpu_id=%lu"
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cpu_frequency "state=%lu cpu_id=%lu"
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cpu_frequency_limits "min=%lu max=%lu cpu_id=%lu"
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A suspend event is used to indicate the system going in and out of the
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suspend mode:
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@ -51,6 +51,16 @@
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#define ARMADA_37XX_DVFS_LOAD_2 2
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#define ARMADA_37XX_DVFS_LOAD_3 3
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/* AVS register set */
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#define ARMADA_37XX_AVS_CTL0 0x0
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#define ARMADA_37XX_AVS_ENABLE BIT(30)
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#define ARMADA_37XX_AVS_HIGH_VDD_LIMIT 16
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#define ARMADA_37XX_AVS_LOW_VDD_LIMIT 22
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#define ARMADA_37XX_AVS_VDD_MASK 0x3F
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#define ARMADA_37XX_AVS_CTL2 0x8
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#define ARMADA_37XX_AVS_LOW_VDD_EN BIT(6)
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#define ARMADA_37XX_AVS_VSET(x) (0x1C + 4 * (x))
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/*
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* On Armada 37xx the Power management manages 4 level of CPU load,
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* each level can be associated with a CPU clock source, a CPU
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@ -58,6 +68,17 @@
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*/
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#define LOAD_LEVEL_NR 4
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#define MIN_VOLT_MV 1000
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/* AVS value for the corresponding voltage (in mV) */
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static int avs_map[] = {
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747, 758, 770, 782, 793, 805, 817, 828, 840, 852, 863, 875, 887, 898,
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910, 922, 933, 945, 957, 968, 980, 992, 1003, 1015, 1027, 1038, 1050,
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1062, 1073, 1085, 1097, 1108, 1120, 1132, 1143, 1155, 1167, 1178, 1190,
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1202, 1213, 1225, 1237, 1248, 1260, 1272, 1283, 1295, 1307, 1318, 1330,
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1342
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};
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struct armada37xx_cpufreq_state {
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struct regmap *regmap;
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u32 nb_l0l1;
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@ -71,6 +92,7 @@ static struct armada37xx_cpufreq_state *armada37xx_cpufreq_state;
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struct armada_37xx_dvfs {
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u32 cpu_freq_max;
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u8 divider[LOAD_LEVEL_NR];
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u32 avs[LOAD_LEVEL_NR];
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};
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static struct armada_37xx_dvfs armada_37xx_dvfs[] = {
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@ -148,6 +170,128 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base,
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clk_set_parent(clk, parent);
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}
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/*
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* Find out the armada 37x supported AVS value whose voltage value is
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* the round-up closest to the target voltage value.
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*/
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static u32 armada_37xx_avs_val_match(int target_vm)
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{
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u32 avs;
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/* Find out the round-up closest supported voltage value */
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for (avs = 0; avs < ARRAY_SIZE(avs_map); avs++)
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if (avs_map[avs] >= target_vm)
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break;
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/*
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* If all supported voltages are smaller than target one,
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* choose the largest supported voltage
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*/
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if (avs == ARRAY_SIZE(avs_map))
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avs = ARRAY_SIZE(avs_map) - 1;
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return avs;
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}
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/*
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* For Armada 37xx soc, L0(VSET0) VDD AVS value is set to SVC revision
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* value or a default value when SVC is not supported.
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* - L0 can be read out from the register of AVS_CTRL_0 and L0 voltage
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* can be got from the mapping table of avs_map.
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* - L1 voltage should be about 100mv smaller than L0 voltage
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* - L2 & L3 voltage should be about 150mv smaller than L0 voltage.
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* This function calculates L1 & L2 & L3 AVS values dynamically based
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* on L0 voltage and fill all AVS values to the AVS value table.
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*/
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static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
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struct armada_37xx_dvfs *dvfs)
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{
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unsigned int target_vm;
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int load_level = 0;
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u32 l0_vdd_min;
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if (base == NULL)
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return;
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/* Get L0 VDD min value */
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regmap_read(base, ARMADA_37XX_AVS_CTL0, &l0_vdd_min);
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l0_vdd_min = (l0_vdd_min >> ARMADA_37XX_AVS_LOW_VDD_LIMIT) &
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ARMADA_37XX_AVS_VDD_MASK;
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if (l0_vdd_min >= ARRAY_SIZE(avs_map)) {
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pr_err("L0 VDD MIN %d is not correct.\n", l0_vdd_min);
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return;
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}
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dvfs->avs[0] = l0_vdd_min;
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if (avs_map[l0_vdd_min] <= MIN_VOLT_MV) {
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/*
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* If L0 voltage is smaller than 1000mv, then all VDD sets
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* use L0 voltage;
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*/
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u32 avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV);
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for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++)
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dvfs->avs[load_level] = avs_min;
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return;
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}
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/*
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* L1 voltage is equal to L0 voltage - 100mv and it must be
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* larger than 1000mv
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*/
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target_vm = avs_map[l0_vdd_min] - 100;
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target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV;
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dvfs->avs[1] = armada_37xx_avs_val_match(target_vm);
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/*
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* L2 & L3 voltage is equal to L0 voltage - 150mv and it must
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* be larger than 1000mv
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*/
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target_vm = avs_map[l0_vdd_min] - 150;
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target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV;
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dvfs->avs[2] = dvfs->avs[3] = armada_37xx_avs_val_match(target_vm);
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}
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static void __init armada37xx_cpufreq_avs_setup(struct regmap *base,
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struct armada_37xx_dvfs *dvfs)
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{
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unsigned int avs_val = 0, freq;
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int load_level = 0;
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if (base == NULL)
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return;
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/* Disable AVS before the configuration */
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regmap_update_bits(base, ARMADA_37XX_AVS_CTL0,
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ARMADA_37XX_AVS_ENABLE, 0);
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/* Enable low voltage mode */
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regmap_update_bits(base, ARMADA_37XX_AVS_CTL2,
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ARMADA_37XX_AVS_LOW_VDD_EN,
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ARMADA_37XX_AVS_LOW_VDD_EN);
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for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++) {
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freq = dvfs->cpu_freq_max / dvfs->divider[load_level];
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avs_val = dvfs->avs[load_level];
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regmap_update_bits(base, ARMADA_37XX_AVS_VSET(load_level-1),
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ARMADA_37XX_AVS_VDD_MASK << ARMADA_37XX_AVS_HIGH_VDD_LIMIT |
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ARMADA_37XX_AVS_VDD_MASK << ARMADA_37XX_AVS_LOW_VDD_LIMIT,
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avs_val << ARMADA_37XX_AVS_HIGH_VDD_LIMIT |
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avs_val << ARMADA_37XX_AVS_LOW_VDD_LIMIT);
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}
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/* Enable AVS after the configuration */
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regmap_update_bits(base, ARMADA_37XX_AVS_CTL0,
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ARMADA_37XX_AVS_ENABLE,
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ARMADA_37XX_AVS_ENABLE);
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}
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static void armada37xx_cpufreq_disable_dvfs(struct regmap *base)
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{
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unsigned int reg = ARMADA_37XX_NB_DYN_MOD,
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@ -216,7 +360,7 @@ static int __init armada37xx_cpufreq_driver_init(void)
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struct platform_device *pdev;
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unsigned long freq;
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unsigned int cur_frequency;
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struct regmap *nb_pm_base;
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struct regmap *nb_pm_base, *avs_base;
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struct device *cpu_dev;
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int load_lvl, ret;
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struct clk *clk;
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@ -227,6 +371,14 @@ static int __init armada37xx_cpufreq_driver_init(void)
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if (IS_ERR(nb_pm_base))
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return -ENODEV;
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avs_base =
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syscon_regmap_lookup_by_compatible("marvell,armada-3700-avs");
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/* if AVS is not present don't use it but still try to setup dvfs */
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if (IS_ERR(avs_base)) {
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pr_info("Syscon failed for Adapting Voltage Scaling: skip it\n");
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avs_base = NULL;
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}
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/* Before doing any configuration on the DVFS first, disable it */
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armada37xx_cpufreq_disable_dvfs(nb_pm_base);
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@ -270,16 +422,21 @@ static int __init armada37xx_cpufreq_driver_init(void)
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armada37xx_cpufreq_state->regmap = nb_pm_base;
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armada37xx_cpufreq_avs_configure(avs_base, dvfs);
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armada37xx_cpufreq_avs_setup(avs_base, dvfs);
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armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider);
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clk_put(clk);
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for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR;
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load_lvl++) {
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unsigned long u_volt = avs_map[dvfs->avs[load_lvl]] * 1000;
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freq = cur_frequency / dvfs->divider[load_lvl];
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ret = dev_pm_opp_add(cpu_dev, freq, 0);
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ret = dev_pm_opp_add(cpu_dev, freq, u_volt);
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if (ret)
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goto remove_opp;
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}
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/* Now that everything is setup, enable the DVFS at hardware level */
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@ -296,10 +296,62 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
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return ret;
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}
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static inline u64 get_delta(u64 t1, u64 t0)
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{
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if (t1 > t0 || t0 > ~(u32)0)
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return t1 - t0;
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return (u32)t1 - (u32)t0;
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}
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static int cppc_get_rate_from_fbctrs(struct cppc_cpudata *cpu,
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struct cppc_perf_fb_ctrs fb_ctrs_t0,
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struct cppc_perf_fb_ctrs fb_ctrs_t1)
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{
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u64 delta_reference, delta_delivered;
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u64 reference_perf, delivered_perf;
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reference_perf = fb_ctrs_t0.reference_perf;
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delta_reference = get_delta(fb_ctrs_t1.reference,
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fb_ctrs_t0.reference);
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delta_delivered = get_delta(fb_ctrs_t1.delivered,
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fb_ctrs_t0.delivered);
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/* Check to avoid divide-by zero */
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if (delta_reference || delta_delivered)
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delivered_perf = (reference_perf * delta_delivered) /
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delta_reference;
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else
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delivered_perf = cpu->perf_ctrls.desired_perf;
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return cppc_cpufreq_perf_to_khz(cpu, delivered_perf);
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}
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static unsigned int cppc_cpufreq_get_rate(unsigned int cpunum)
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{
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struct cppc_perf_fb_ctrs fb_ctrs_t0 = {0}, fb_ctrs_t1 = {0};
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struct cppc_cpudata *cpu = all_cpu_data[cpunum];
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int ret;
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ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t0);
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if (ret)
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return ret;
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udelay(2); /* 2usec delay between sampling */
|
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|
||||
ret = cppc_get_perf_ctrs(cpunum, &fb_ctrs_t1);
|
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if (ret)
|
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return ret;
|
||||
|
||||
return cppc_get_rate_from_fbctrs(cpu, fb_ctrs_t0, fb_ctrs_t1);
|
||||
}
|
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|
||||
static struct cpufreq_driver cppc_cpufreq_driver = {
|
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.flags = CPUFREQ_CONST_LOOPS,
|
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.verify = cppc_verify_policy,
|
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.target = cppc_cpufreq_set_target,
|
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.get = cppc_cpufreq_get_rate,
|
||||
.init = cppc_cpufreq_cpu_init,
|
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.stop_cpu = cppc_cpufreq_stop_cpu,
|
||||
.name = "cppc_cpufreq",
|
||||
|
|
|
|||
|
|
@ -923,7 +923,12 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
|
|||
struct freq_attr *fattr = to_attr(attr);
|
||||
ssize_t ret = -EINVAL;
|
||||
|
||||
cpus_read_lock();
|
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/*
|
||||
* cpus_read_trylock() is used here to work around a circular lock
|
||||
* dependency problem with respect to the cpufreq_register_driver().
|
||||
*/
|
||||
if (!cpus_read_trylock())
|
||||
return -EBUSY;
|
||||
|
||||
if (cpu_online(policy->cpu)) {
|
||||
down_write(&policy->rwsem);
|
||||
|
|
@ -2236,6 +2241,7 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy,
|
|||
|
||||
policy->min = new_policy->min;
|
||||
policy->max = new_policy->max;
|
||||
trace_cpu_frequency_limits(policy);
|
||||
|
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policy->cached_target_freq = UINT_MAX;
|
||||
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/cpu_cooling.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
|
|
@ -50,6 +51,7 @@ static struct clk_bulk_data clks[] = {
|
|||
};
|
||||
|
||||
static struct device *cpu_dev;
|
||||
static struct thermal_cooling_device *cdev;
|
||||
static bool free_opp;
|
||||
static struct cpufreq_frequency_table *freq_table;
|
||||
static unsigned int max_freq;
|
||||
|
|
@ -191,6 +193,16 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void imx6q_cpufreq_ready(struct cpufreq_policy *policy)
|
||||
{
|
||||
cdev = of_cpufreq_cooling_register(policy);
|
||||
|
||||
if (!cdev)
|
||||
dev_err(cpu_dev,
|
||||
"running cpufreq without cooling device: %ld\n",
|
||||
PTR_ERR(cdev));
|
||||
}
|
||||
|
||||
static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
int ret;
|
||||
|
|
@ -202,13 +214,22 @@ static int imx6q_cpufreq_init(struct cpufreq_policy *policy)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int imx6q_cpufreq_exit(struct cpufreq_policy *policy)
|
||||
{
|
||||
cpufreq_cooling_unregister(cdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct cpufreq_driver imx6q_cpufreq_driver = {
|
||||
.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
.target_index = imx6q_set_target,
|
||||
.get = cpufreq_generic_get,
|
||||
.init = imx6q_cpufreq_init,
|
||||
.exit = imx6q_cpufreq_exit,
|
||||
.name = "imx6q-cpufreq",
|
||||
.ready = imx6q_cpufreq_ready,
|
||||
.attr = cpufreq_generic_attr,
|
||||
.suspend = cpufreq_generic_suspend,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -670,21 +670,18 @@ static ssize_t store_energy_performance_preference(
|
|||
{
|
||||
struct cpudata *cpu_data = all_cpu_data[policy->cpu];
|
||||
char str_preference[21];
|
||||
int ret, i = 0;
|
||||
int ret;
|
||||
|
||||
ret = sscanf(buf, "%20s", str_preference);
|
||||
if (ret != 1)
|
||||
return -EINVAL;
|
||||
|
||||
while (energy_perf_strings[i] != NULL) {
|
||||
if (!strcmp(str_preference, energy_perf_strings[i])) {
|
||||
intel_pstate_set_energy_pref_index(cpu_data, i);
|
||||
return count;
|
||||
}
|
||||
++i;
|
||||
}
|
||||
ret = match_string(energy_perf_strings, -1, str_preference);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return -EINVAL;
|
||||
intel_pstate_set_energy_pref_index(cpu_data, ret);
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t show_energy_performance_preference(
|
||||
|
|
@ -2011,7 +2008,8 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy)
|
|||
static void intel_pstate_adjust_policy_max(struct cpufreq_policy *policy,
|
||||
struct cpudata *cpu)
|
||||
{
|
||||
if (cpu->pstate.max_pstate_physical > cpu->pstate.max_pstate &&
|
||||
if (!hwp_active &&
|
||||
cpu->pstate.max_pstate_physical > cpu->pstate.max_pstate &&
|
||||
policy->max < policy->cpuinfo.max_freq &&
|
||||
policy->max > cpu->pstate.max_freq) {
|
||||
pr_debug("policy->max > max non turbo frequency\n");
|
||||
|
|
@ -2085,6 +2083,15 @@ static int __intel_pstate_cpu_init(struct cpufreq_policy *policy)
|
|||
cpu->pstate.max_pstate : cpu->pstate.turbo_pstate;
|
||||
policy->cpuinfo.max_freq *= cpu->pstate.scaling;
|
||||
|
||||
if (hwp_active) {
|
||||
unsigned int max_freq;
|
||||
|
||||
max_freq = global.turbo_disabled ?
|
||||
cpu->pstate.max_freq : cpu->pstate.turbo_freq;
|
||||
if (max_freq < policy->cpuinfo.max_freq)
|
||||
policy->cpuinfo.max_freq = max_freq;
|
||||
}
|
||||
|
||||
intel_pstate_init_acpi_perf_limits(policy);
|
||||
|
||||
policy->fast_switch_possible = true;
|
||||
|
|
|
|||
|
|
@ -593,6 +593,15 @@ static int __init pcc_cpufreq_init(void)
|
|||
return ret;
|
||||
}
|
||||
|
||||
if (num_present_cpus() > 4) {
|
||||
pcc_cpufreq_driver.flags |= CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING;
|
||||
pr_err("%s: Too many CPUs, dynamic performance scaling disabled\n",
|
||||
__func__);
|
||||
pr_err("%s: Try to enable another scaling driver through BIOS settings\n",
|
||||
__func__);
|
||||
pr_err("%s: and complain to the system vendor\n", __func__);
|
||||
}
|
||||
|
||||
ret = cpufreq_register_driver(&pcc_cpufreq_driver);
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -109,8 +109,9 @@ static int qcom_cpufreq_kryo_probe(struct platform_device *pdev)
|
|||
speedbin_nvmem = of_nvmem_cell_get(np, NULL);
|
||||
of_node_put(np);
|
||||
if (IS_ERR(speedbin_nvmem)) {
|
||||
dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
|
||||
PTR_ERR(speedbin_nvmem));
|
||||
if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
|
||||
dev_err(cpu_dev, "Could not get nvmem cell: %ld\n",
|
||||
PTR_ERR(speedbin_nvmem));
|
||||
return PTR_ERR(speedbin_nvmem);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
// Copyright 2013 Freescale Semiconductor, Inc.
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/cpu_cooling.h>
|
||||
#include <linux/delay.h>
|
||||
|
|
@ -644,6 +645,27 @@ static const struct of_device_id of_imx_thermal_match[] = {
|
|||
};
|
||||
MODULE_DEVICE_TABLE(of, of_imx_thermal_match);
|
||||
|
||||
/*
|
||||
* Create cooling device in case no #cooling-cells property is available in
|
||||
* CPU node
|
||||
*/
|
||||
static int imx_thermal_register_legacy_cooling(struct imx_thermal_data *data)
|
||||
{
|
||||
struct device_node *np = of_get_cpu_node(data->policy->cpu, NULL);
|
||||
int ret;
|
||||
|
||||
if (!np || !of_find_property(np, "#cooling-cells", NULL)) {
|
||||
data->cdev = cpufreq_cooling_register(data->policy);
|
||||
if (IS_ERR(data->cdev)) {
|
||||
ret = PTR_ERR(data->cdev);
|
||||
cpufreq_cpu_put(data->policy);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int imx_thermal_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct imx_thermal_data *data;
|
||||
|
|
@ -724,12 +746,10 @@ static int imx_thermal_probe(struct platform_device *pdev)
|
|||
return -EPROBE_DEFER;
|
||||
}
|
||||
|
||||
data->cdev = cpufreq_cooling_register(data->policy);
|
||||
if (IS_ERR(data->cdev)) {
|
||||
ret = PTR_ERR(data->cdev);
|
||||
ret = imx_thermal_register_legacy_cooling(data);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev,
|
||||
"failed to register cpufreq cooling device: %d\n", ret);
|
||||
cpufreq_cpu_put(data->policy);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -103,6 +103,7 @@ extern void cpus_write_lock(void);
|
|||
extern void cpus_write_unlock(void);
|
||||
extern void cpus_read_lock(void);
|
||||
extern void cpus_read_unlock(void);
|
||||
extern int cpus_read_trylock(void);
|
||||
extern void lockdep_assert_cpus_held(void);
|
||||
extern void cpu_hotplug_disable(void);
|
||||
extern void cpu_hotplug_enable(void);
|
||||
|
|
@ -115,6 +116,7 @@ static inline void cpus_write_lock(void) { }
|
|||
static inline void cpus_write_unlock(void) { }
|
||||
static inline void cpus_read_lock(void) { }
|
||||
static inline void cpus_read_unlock(void) { }
|
||||
static inline int cpus_read_trylock(void) { return true; }
|
||||
static inline void lockdep_assert_cpus_held(void) { }
|
||||
static inline void cpu_hotplug_disable(void) { }
|
||||
static inline void cpu_hotplug_enable(void) { }
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
#if !defined(_TRACE_POWER_H) || defined(TRACE_HEADER_MULTI_READ)
|
||||
#define _TRACE_POWER_H
|
||||
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/ktime.h>
|
||||
#include <linux/pm_qos.h>
|
||||
#include <linux/tracepoint.h>
|
||||
|
|
@ -148,6 +149,30 @@ DEFINE_EVENT(cpu, cpu_frequency,
|
|||
TP_ARGS(frequency, cpu_id)
|
||||
);
|
||||
|
||||
TRACE_EVENT(cpu_frequency_limits,
|
||||
|
||||
TP_PROTO(struct cpufreq_policy *policy),
|
||||
|
||||
TP_ARGS(policy),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__field(u32, min_freq)
|
||||
__field(u32, max_freq)
|
||||
__field(u32, cpu_id)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__entry->min_freq = policy->min;
|
||||
__entry->max_freq = policy->max;
|
||||
__entry->cpu_id = policy->cpu;
|
||||
),
|
||||
|
||||
TP_printk("min=%lu max=%lu cpu_id=%lu",
|
||||
(unsigned long)__entry->min_freq,
|
||||
(unsigned long)__entry->max_freq,
|
||||
(unsigned long)__entry->cpu_id)
|
||||
);
|
||||
|
||||
TRACE_EVENT(device_pm_callback_start,
|
||||
|
||||
TP_PROTO(struct device *dev, const char *pm_ops, int event),
|
||||
|
|
|
|||
|
|
@ -290,6 +290,12 @@ void cpus_read_lock(void)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(cpus_read_lock);
|
||||
|
||||
int cpus_read_trylock(void)
|
||||
{
|
||||
return percpu_down_read_trylock(&cpu_hotplug_lock);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cpus_read_trylock);
|
||||
|
||||
void cpus_read_unlock(void)
|
||||
{
|
||||
percpu_up_read(&cpu_hotplug_lock);
|
||||
|
|
|
|||
Loading…
Reference in New Issue