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drm/i915: add SBI registers
Those are responsible for the Sideband Interface programming. v2: rename SBI bits to better reflect their meaning Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4116,4 +4116,16 @@
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DDI_BUF_TRANS_A, \
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DDI_BUF_TRANS_B)
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/* Sideband Interface (SBI) is programmed indirectly, via
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* SBI_ADDR, which contains the register offset; and SBI_DATA,
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* which contains the payload */
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#define SBI_ADDR 0xC6000
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#define SBI_DATA 0xC6004
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#define SBI_CTL_STAT 0xC6008
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#define SBI_CTL_OP_CRRD (0x6<<8)
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#define SBI_CTL_OP_CRWR (0x7<<8)
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#define SBI_RESPONSE_FAIL (0x1<<1)
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#define SBI_RESPONSE_SUCCESS (0x0<<1)
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#define SBI_BUSY (0x1<<0)
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#define SBI_READY (0x0<<0)
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#endif /* _I915_REG_H_ */
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