mirror of https://gitee.com/openkylin/linux.git
gpu: host1x: Add host1x driver
Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
This commit is contained in:
Terje Bergstrom
Thierry Reding
parent
e1adc78caf
commit
7547168743
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@ -1 +1,2 @@
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obj-y += drm/ vga/
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obj-$(CONFIG_TEGRA_HOST1X) += host1x/
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@ -0,0 +1,10 @@
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config TEGRA_HOST1X
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tristate "NVIDIA Tegra host1x driver"
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depends on ARCH_TEGRA || ARCH_MULTIPLATFORM
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help
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Driver for the NVIDIA Tegra host1x hardware.
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The Tegra host1x module is the DMA engine for register access to
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Tegra's graphics- and multimedia-related modules. The modules served
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by host1x are referred to as clients. host1x includes some other
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functionality, such as synchronization.
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@ -0,0 +1,8 @@
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ccflags-y = -Idrivers/gpu/host1x
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host1x-y = \
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syncpt.o \
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dev.o \
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hw/host1x01.o
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obj-$(CONFIG_TEGRA_HOST1X) += host1x.o
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@ -0,0 +1,153 @@
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/*
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* Tegra host1x driver
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*
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* Copyright (c) 2010-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/host1x.h>
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#include "dev.h"
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#include "hw/host1x01.h"
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void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)
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{
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void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
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writel(v, sync_regs + r);
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}
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u32 host1x_sync_readl(struct host1x *host1x, u32 r)
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{
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void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;
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return readl(sync_regs + r);
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}
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static const struct host1x_info host1x01_info = {
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.nb_channels = 8,
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.nb_pts = 32,
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.nb_mlocks = 16,
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.nb_bases = 8,
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.init = host1x01_init,
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.sync_offset = 0x3000,
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};
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static struct of_device_id host1x_of_match[] = {
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{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
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{ .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
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{ },
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};
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MODULE_DEVICE_TABLE(of, host1x_of_match);
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static int host1x_probe(struct platform_device *pdev)
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{
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const struct of_device_id *id;
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struct host1x *host;
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struct resource *regs;
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int syncpt_irq;
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int err;
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id = of_match_device(host1x_of_match, &pdev->dev);
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if (!id)
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return -EINVAL;
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!regs) {
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dev_err(&pdev->dev, "failed to get registers\n");
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return -ENXIO;
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}
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syncpt_irq = platform_get_irq(pdev, 0);
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if (syncpt_irq < 0) {
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dev_err(&pdev->dev, "failed to get IRQ\n");
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return -ENXIO;
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}
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host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
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if (!host)
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return -ENOMEM;
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host->dev = &pdev->dev;
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host->info = id->data;
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/* set common host1x device data */
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platform_set_drvdata(pdev, host);
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host->regs = devm_ioremap_resource(&pdev->dev, regs);
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if (IS_ERR(host->regs))
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return PTR_ERR(host->regs);
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if (host->info->init) {
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err = host->info->init(host);
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if (err)
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return err;
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}
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host->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(host->clk)) {
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dev_err(&pdev->dev, "failed to get clock\n");
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err = PTR_ERR(host->clk);
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return err;
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}
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err = clk_prepare_enable(host->clk);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to enable clock\n");
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return err;
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}
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err = host1x_syncpt_init(host);
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if (err) {
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dev_err(&pdev->dev, "failed to initialize syncpts\n");
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return err;
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}
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return 0;
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}
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static int __exit host1x_remove(struct platform_device *pdev)
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{
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struct host1x *host = platform_get_drvdata(pdev);
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host1x_syncpt_deinit(host);
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clk_disable_unprepare(host->clk);
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return 0;
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}
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static struct platform_driver platform_driver = {
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.probe = host1x_probe,
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.remove = __exit_p(host1x_remove),
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.driver = {
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.owner = THIS_MODULE,
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.name = "tegra-host1x",
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.of_match_table = host1x_of_match,
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},
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};
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module_platform_driver(platform_driver);
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MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>");
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MODULE_DESCRIPTION("Host1x driver for Tegra products");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,96 @@
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/*
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* Copyright (c) 2012-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HOST1X_DEV_H
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#define HOST1X_DEV_H
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include "syncpt.h"
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struct host1x_syncpt;
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struct host1x_syncpt_ops {
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void (*restore)(struct host1x_syncpt *syncpt);
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void (*restore_wait_base)(struct host1x_syncpt *syncpt);
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void (*load_wait_base)(struct host1x_syncpt *syncpt);
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u32 (*load)(struct host1x_syncpt *syncpt);
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void (*cpu_incr)(struct host1x_syncpt *syncpt);
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int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr);
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};
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struct host1x_info {
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int nb_channels; /* host1x: num channels supported */
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int nb_pts; /* host1x: num syncpoints supported */
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int nb_bases; /* host1x: num syncpoints supported */
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int nb_mlocks; /* host1x: number of mlocks */
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int (*init)(struct host1x *); /* initialize per SoC ops */
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int sync_offset;
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};
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struct host1x {
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const struct host1x_info *info;
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void __iomem *regs;
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struct host1x_syncpt *syncpt;
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struct device *dev;
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struct clk *clk;
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const struct host1x_syncpt_ops *syncpt_op;
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};
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void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v);
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u32 host1x_sync_readl(struct host1x *host1x, u32 r);
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static inline void host1x_hw_syncpt_restore(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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host->syncpt_op->restore(sp);
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}
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static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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host->syncpt_op->restore_wait_base(sp);
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}
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static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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host->syncpt_op->load_wait_base(sp);
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}
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static inline u32 host1x_hw_syncpt_load(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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return host->syncpt_op->load(sp);
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}
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static inline void host1x_hw_syncpt_cpu_incr(struct host1x *host,
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struct host1x_syncpt *sp)
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{
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host->syncpt_op->cpu_incr(sp);
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}
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static inline int host1x_hw_syncpt_patch_wait(struct host1x *host,
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struct host1x_syncpt *sp,
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void *patch_addr)
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{
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return host->syncpt_op->patch_wait(sp, patch_addr);
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}
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#endif
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@ -0,0 +1,6 @@
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ccflags-y = -Idrivers/gpu/host1x
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host1x-hw-objs = \
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host1x01.o
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obj-$(CONFIG_TEGRA_HOST1X) += host1x-hw.o
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/*
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* Host1x init for T20 and T30 Architecture Chips
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*
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* Copyright (c) 2011-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* include hw specification */
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#include "hw/host1x01.h"
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#include "hw/host1x01_hardware.h"
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/* include code */
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#include "hw/syncpt_hw.c"
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#include "dev.h"
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int host1x01_init(struct host1x *host)
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{
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host->syncpt_op = &host1x_syncpt_ops;
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return 0;
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}
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@ -0,0 +1,25 @@
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/*
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* Host1x init for T20 and T30 Architecture Chips
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*
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* Copyright (c) 2011-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
|
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HOST1X_HOST1X01_H
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#define HOST1X_HOST1X01_H
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struct host1x;
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int host1x01_init(struct host1x *host);
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#endif /* HOST1X_HOST1X01_H_ */
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/*
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* Tegra host1x Register Offsets for Tegra20 and Tegra30
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*
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* Copyright (c) 2010-2013 NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
|
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* version 2, as published by the Free Software Foundation.
|
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*
|
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* This program is distributed in the hope it will be useful, but WITHOUT
|
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __HOST1X_HOST1X01_HARDWARE_H
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#define __HOST1X_HOST1X01_HARDWARE_H
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include "hw_host1x01_sync.h"
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#endif
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@ -0,0 +1,74 @@
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/*
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* Copyright (c) 2012-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
|
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* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
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* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
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*
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*/
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/*
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* Function naming determines intended use:
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*
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* <x>_r(void) : Returns the offset for register <x>.
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*
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* <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
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*
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* <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
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*
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* <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
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* and masked to place it at field <y> of register <x>. This value
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* can be |'d with others to produce a full register value for
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* register <x>.
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*
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* <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
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* value can be ~'d and then &'d to clear the value of field <y> for
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* register <x>.
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*
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* <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
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* to place it at field <y> of register <x>. This value can be |'d
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* with others to produce a full register value for <x>.
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*
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* <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
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* <x> value 'r' after being shifted to place its LSB at bit 0.
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* This value is suitable for direct comparison with other unshifted
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* values appropriate for use in field <y> of register <x>.
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*
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* <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
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* field <y> of register <x>. This value is suitable for direct
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* comparison with unshifted values appropriate for use in field <y>
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* of register <x>.
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*/
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#ifndef __hw_host1x01_sync_h__
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#define __hw_host1x01_sync_h__
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#define REGISTER_STRIDE 4
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static inline u32 host1x_sync_syncpt_r(unsigned int id)
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{
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return 0x400 + id * REGISTER_STRIDE;
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}
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#define HOST1X_SYNC_SYNCPT(id) \
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host1x_sync_syncpt_r(id)
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static inline u32 host1x_sync_syncpt_base_r(unsigned int id)
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{
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return 0x600 + id * REGISTER_STRIDE;
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}
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#define HOST1X_SYNC_SYNCPT_BASE(id) \
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host1x_sync_syncpt_base_r(id)
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static inline u32 host1x_sync_syncpt_cpu_incr_r(unsigned int id)
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{
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return 0x700 + id * REGISTER_STRIDE;
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}
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#define HOST1X_SYNC_SYNCPT_CPU_INCR(id) \
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host1x_sync_syncpt_cpu_incr_r(id)
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#endif /* __hw_host1x01_sync_h__ */
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|
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@ -0,0 +1,102 @@
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/*
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* Tegra host1x Syncpoints
|
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*
|
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* Copyright (c) 2010-2013, NVIDIA Corporation.
|
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*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "dev.h"
|
||||
#include "syncpt.h"
|
||||
|
||||
/*
|
||||
* Write the current syncpoint value back to hw.
|
||||
*/
|
||||
static void syncpt_restore(struct host1x_syncpt *sp)
|
||||
{
|
||||
struct host1x *host = sp->host;
|
||||
int min = host1x_syncpt_read_min(sp);
|
||||
host1x_sync_writel(host, min, HOST1X_SYNC_SYNCPT(sp->id));
|
||||
}
|
||||
|
||||
/*
|
||||
* Write the current waitbase value back to hw.
|
||||
*/
|
||||
static void syncpt_restore_wait_base(struct host1x_syncpt *sp)
|
||||
{
|
||||
struct host1x *host = sp->host;
|
||||
host1x_sync_writel(host, sp->base_val,
|
||||
HOST1X_SYNC_SYNCPT_BASE(sp->id));
|
||||
}
|
||||
|
||||
/*
|
||||
* Read waitbase value from hw.
|
||||
*/
|
||||
static void syncpt_read_wait_base(struct host1x_syncpt *sp)
|
||||
{
|
||||
struct host1x *host = sp->host;
|
||||
sp->base_val =
|
||||
host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(sp->id));
|
||||
}
|
||||
|
||||
/*
|
||||
* Updates the last value read from hardware.
|
||||
*/
|
||||
static u32 syncpt_load(struct host1x_syncpt *sp)
|
||||
{
|
||||
struct host1x *host = sp->host;
|
||||
u32 old, live;
|
||||
|
||||
/* Loop in case there's a race writing to min_val */
|
||||
do {
|
||||
old = host1x_syncpt_read_min(sp);
|
||||
live = host1x_sync_readl(host, HOST1X_SYNC_SYNCPT(sp->id));
|
||||
} while ((u32)atomic_cmpxchg(&sp->min_val, old, live) != old);
|
||||
|
||||
if (!host1x_syncpt_check_max(sp, live))
|
||||
dev_err(host->dev, "%s failed: id=%u, min=%d, max=%d\n",
|
||||
__func__, sp->id, host1x_syncpt_read_min(sp),
|
||||
host1x_syncpt_read_max(sp));
|
||||
|
||||
return live;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write a cpu syncpoint increment to the hardware, without touching
|
||||
* the cache.
|
||||
*/
|
||||
static void syncpt_cpu_incr(struct host1x_syncpt *sp)
|
||||
{
|
||||
struct host1x *host = sp->host;
|
||||
u32 reg_offset = sp->id / 32;
|
||||
|
||||
if (!host1x_syncpt_client_managed(sp) &&
|
||||
host1x_syncpt_idle(sp)) {
|
||||
dev_err(host->dev, "Trying to increment syncpoint id %d beyond max\n",
|
||||
sp->id);
|
||||
return;
|
||||
}
|
||||
host1x_sync_writel(host, BIT_MASK(sp->id),
|
||||
HOST1X_SYNC_SYNCPT_CPU_INCR(reg_offset));
|
||||
wmb();
|
||||
}
|
||||
|
||||
static const struct host1x_syncpt_ops host1x_syncpt_ops = {
|
||||
.restore = syncpt_restore,
|
||||
.restore_wait_base = syncpt_restore_wait_base,
|
||||
.load_wait_base = syncpt_read_wait_base,
|
||||
.load = syncpt_load,
|
||||
.cpu_incr = syncpt_cpu_incr,
|
||||
};
|
||||
|
|
@ -0,0 +1,212 @@
|
|||
/*
|
||||
* Tegra host1x Syncpoints
|
||||
*
|
||||
* Copyright (c) 2010-2013, NVIDIA Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <trace/events/host1x.h>
|
||||
|
||||
#include "syncpt.h"
|
||||
#include "dev.h"
|
||||
|
||||
static struct host1x_syncpt *_host1x_syncpt_alloc(struct host1x *host,
|
||||
struct device *dev,
|
||||
int client_managed)
|
||||
{
|
||||
int i;
|
||||
struct host1x_syncpt *sp = host->syncpt;
|
||||
char *name;
|
||||
|
||||
for (i = 0; i < host->info->nb_pts && sp->name; i++, sp++)
|
||||
;
|
||||
if (sp->dev)
|
||||
return NULL;
|
||||
|
||||
name = kasprintf(GFP_KERNEL, "%02d-%s", sp->id,
|
||||
dev ? dev_name(dev) : NULL);
|
||||
if (!name)
|
||||
return NULL;
|
||||
|
||||
sp->dev = dev;
|
||||
sp->name = name;
|
||||
sp->client_managed = client_managed;
|
||||
|
||||
return sp;
|
||||
}
|
||||
|
||||
u32 host1x_syncpt_id(struct host1x_syncpt *sp)
|
||||
{
|
||||
return sp->id;
|
||||
}
|
||||
|
||||
/*
|
||||
* Updates the value sent to hardware.
|
||||
*/
|
||||
u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs)
|
||||
{
|
||||
return (u32)atomic_add_return(incrs, &sp->max_val);
|
||||
}
|
||||
|
||||
/*
|
||||
* Write cached syncpoint and waitbase values to hardware.
|
||||
*/
|
||||
void host1x_syncpt_restore(struct host1x *host)
|
||||
{
|
||||
struct host1x_syncpt *sp_base = host->syncpt;
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i < host1x_syncpt_nb_pts(host); i++)
|
||||
host1x_hw_syncpt_restore(host, sp_base + i);
|
||||
for (i = 0; i < host1x_syncpt_nb_bases(host); i++)
|
||||
host1x_hw_syncpt_restore_wait_base(host, sp_base + i);
|
||||
wmb();
|
||||
}
|
||||
|
||||
/*
|
||||
* Update the cached syncpoint and waitbase values by reading them
|
||||
* from the registers.
|
||||
*/
|
||||
void host1x_syncpt_save(struct host1x *host)
|
||||
{
|
||||
struct host1x_syncpt *sp_base = host->syncpt;
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i < host1x_syncpt_nb_pts(host); i++) {
|
||||
if (host1x_syncpt_client_managed(sp_base + i))
|
||||
host1x_hw_syncpt_load(host, sp_base + i);
|
||||
else
|
||||
WARN_ON(!host1x_syncpt_idle(sp_base + i));
|
||||
}
|
||||
|
||||
for (i = 0; i < host1x_syncpt_nb_bases(host); i++)
|
||||
host1x_hw_syncpt_load_wait_base(host, sp_base + i);
|
||||
}
|
||||
|
||||
/*
|
||||
* Updates the cached syncpoint value by reading a new value from the hardware
|
||||
* register
|
||||
*/
|
||||
u32 host1x_syncpt_load(struct host1x_syncpt *sp)
|
||||
{
|
||||
u32 val;
|
||||
val = host1x_hw_syncpt_load(sp->host, sp);
|
||||
trace_host1x_syncpt_load_min(sp->id, val);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* Get the current syncpoint base
|
||||
*/
|
||||
u32 host1x_syncpt_load_wait_base(struct host1x_syncpt *sp)
|
||||
{
|
||||
u32 val;
|
||||
host1x_hw_syncpt_load_wait_base(sp->host, sp);
|
||||
val = sp->base_val;
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write a cpu syncpoint increment to the hardware, without touching
|
||||
* the cache. Caller is responsible for host being powered.
|
||||
*/
|
||||
void host1x_syncpt_cpu_incr(struct host1x_syncpt *sp)
|
||||
{
|
||||
host1x_hw_syncpt_cpu_incr(sp->host, sp);
|
||||
}
|
||||
|
||||
/*
|
||||
* Increment syncpoint value from cpu, updating cache
|
||||
*/
|
||||
void host1x_syncpt_incr(struct host1x_syncpt *sp)
|
||||
{
|
||||
if (host1x_syncpt_client_managed(sp))
|
||||
host1x_syncpt_incr_max(sp, 1);
|
||||
host1x_syncpt_cpu_incr(sp);
|
||||
}
|
||||
|
||||
int host1x_syncpt_init(struct host1x *host)
|
||||
{
|
||||
struct host1x_syncpt *syncpt;
|
||||
int i;
|
||||
|
||||
syncpt = devm_kzalloc(host->dev, sizeof(*syncpt) * host->info->nb_pts,
|
||||
GFP_KERNEL);
|
||||
if (!syncpt)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < host->info->nb_pts; ++i) {
|
||||
syncpt[i].id = i;
|
||||
syncpt[i].host = host;
|
||||
}
|
||||
|
||||
host->syncpt = syncpt;
|
||||
|
||||
host1x_syncpt_restore(host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct host1x_syncpt *host1x_syncpt_request(struct device *dev,
|
||||
int client_managed)
|
||||
{
|
||||
struct host1x *host = dev_get_drvdata(dev->parent);
|
||||
return _host1x_syncpt_alloc(host, dev, client_managed);
|
||||
}
|
||||
|
||||
void host1x_syncpt_free(struct host1x_syncpt *sp)
|
||||
{
|
||||
if (!sp)
|
||||
return;
|
||||
|
||||
kfree(sp->name);
|
||||
sp->dev = NULL;
|
||||
sp->name = NULL;
|
||||
sp->client_managed = 0;
|
||||
}
|
||||
|
||||
void host1x_syncpt_deinit(struct host1x *host)
|
||||
{
|
||||
int i;
|
||||
struct host1x_syncpt *sp = host->syncpt;
|
||||
for (i = 0; i < host->info->nb_pts; i++, sp++)
|
||||
kfree(sp->name);
|
||||
}
|
||||
|
||||
int host1x_syncpt_nb_pts(struct host1x *host)
|
||||
{
|
||||
return host->info->nb_pts;
|
||||
}
|
||||
|
||||
int host1x_syncpt_nb_bases(struct host1x *host)
|
||||
{
|
||||
return host->info->nb_bases;
|
||||
}
|
||||
|
||||
int host1x_syncpt_nb_mlocks(struct host1x *host)
|
||||
{
|
||||
return host->info->nb_mlocks;
|
||||
}
|
||||
|
||||
struct host1x_syncpt *host1x_syncpt_get(struct host1x *host, u32 id)
|
||||
{
|
||||
if (host->info->nb_pts < id)
|
||||
return NULL;
|
||||
return host->syncpt + id;
|
||||
}
|
||||
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* Tegra host1x Syncpoints
|
||||
*
|
||||
* Copyright (c) 2010-2013, NVIDIA Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef __HOST1X_SYNCPT_H
|
||||
#define __HOST1X_SYNCPT_H
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
struct host1x;
|
||||
|
||||
struct host1x_syncpt {
|
||||
int id;
|
||||
atomic_t min_val;
|
||||
atomic_t max_val;
|
||||
u32 base_val;
|
||||
const char *name;
|
||||
int client_managed;
|
||||
struct host1x *host;
|
||||
struct device *dev;
|
||||
};
|
||||
|
||||
/* Initialize sync point array */
|
||||
int host1x_syncpt_init(struct host1x *host);
|
||||
|
||||
/* Free sync point array */
|
||||
void host1x_syncpt_deinit(struct host1x *host);
|
||||
|
||||
/*
|
||||
* Read max. It indicates how many operations there are in queue, either in
|
||||
* channel or in a software thread.
|
||||
* */
|
||||
static inline u32 host1x_syncpt_read_max(struct host1x_syncpt *sp)
|
||||
{
|
||||
smp_rmb();
|
||||
return (u32)atomic_read(&sp->max_val);
|
||||
}
|
||||
|
||||
/*
|
||||
* Read min, which is a shadow of the current sync point value in hardware.
|
||||
*/
|
||||
static inline u32 host1x_syncpt_read_min(struct host1x_syncpt *sp)
|
||||
{
|
||||
smp_rmb();
|
||||
return (u32)atomic_read(&sp->min_val);
|
||||
}
|
||||
|
||||
/* Return number of sync point supported. */
|
||||
int host1x_syncpt_nb_pts(struct host1x *host);
|
||||
|
||||
/* Return number of wait bases supported. */
|
||||
int host1x_syncpt_nb_bases(struct host1x *host);
|
||||
|
||||
/* Return number of mlocks supported. */
|
||||
int host1x_syncpt_nb_mlocks(struct host1x *host);
|
||||
|
||||
/*
|
||||
* Check sync point sanity. If max is larger than min, there have too many
|
||||
* sync point increments.
|
||||
*
|
||||
* Client managed sync point are not tracked.
|
||||
* */
|
||||
static inline bool host1x_syncpt_check_max(struct host1x_syncpt *sp, u32 real)
|
||||
{
|
||||
u32 max;
|
||||
if (sp->client_managed)
|
||||
return true;
|
||||
max = host1x_syncpt_read_max(sp);
|
||||
return (s32)(max - real) >= 0;
|
||||
}
|
||||
|
||||
/* Return true if sync point is client managed. */
|
||||
static inline int host1x_syncpt_client_managed(struct host1x_syncpt *sp)
|
||||
{
|
||||
return sp->client_managed;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns true if syncpoint min == max, which means that there are no
|
||||
* outstanding operations.
|
||||
*/
|
||||
static inline bool host1x_syncpt_idle(struct host1x_syncpt *sp)
|
||||
{
|
||||
int min, max;
|
||||
smp_rmb();
|
||||
min = atomic_read(&sp->min_val);
|
||||
max = atomic_read(&sp->max_val);
|
||||
return (min == max);
|
||||
}
|
||||
|
||||
/* Return pointer to struct denoting sync point id. */
|
||||
struct host1x_syncpt *host1x_syncpt_get(struct host1x *host, u32 id);
|
||||
|
||||
/* Request incrementing a sync point. */
|
||||
void host1x_syncpt_cpu_incr(struct host1x_syncpt *sp);
|
||||
|
||||
/* Load current value from hardware to the shadow register. */
|
||||
u32 host1x_syncpt_load(struct host1x_syncpt *sp);
|
||||
|
||||
/* Save host1x sync point state into shadow registers. */
|
||||
void host1x_syncpt_save(struct host1x *host);
|
||||
|
||||
/* Reset host1x sync point state from shadow registers. */
|
||||
void host1x_syncpt_restore(struct host1x *host);
|
||||
|
||||
/* Read current wait base value into shadow register and return it. */
|
||||
u32 host1x_syncpt_load_wait_base(struct host1x_syncpt *sp);
|
||||
|
||||
/* Increment sync point and its max. */
|
||||
void host1x_syncpt_incr(struct host1x_syncpt *sp);
|
||||
|
||||
/* Indicate future operations by incrementing the sync point max. */
|
||||
u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs);
|
||||
|
||||
/* Check if sync point id is valid. */
|
||||
static inline int host1x_syncpt_is_valid(struct host1x_syncpt *sp)
|
||||
{
|
||||
return sp->id < host1x_syncpt_nb_pts(sp->host);
|
||||
}
|
||||
|
||||
/* Return id of the sync point */
|
||||
u32 host1x_syncpt_id(struct host1x_syncpt *sp);
|
||||
|
||||
/* Allocate a sync point for a device. */
|
||||
struct host1x_syncpt *host1x_syncpt_request(struct device *dev,
|
||||
int client_managed);
|
||||
|
||||
/* Free a sync point. */
|
||||
void host1x_syncpt_free(struct host1x_syncpt *sp);
|
||||
|
||||
#endif
|
||||
|
|
@ -21,6 +21,8 @@ source "drivers/gpu/vga/Kconfig"
|
|||
|
||||
source "drivers/gpu/drm/Kconfig"
|
||||
|
||||
source "drivers/gpu/host1x/Kconfig"
|
||||
|
||||
config VGASTATE
|
||||
tristate
|
||||
default n
|
||||
|
|
|
|||
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* include/trace/events/host1x.h
|
||||
*
|
||||
* host1x event logging to ftrace.
|
||||
*
|
||||
* Copyright (c) 2010-2013, NVIDIA Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#undef TRACE_SYSTEM
|
||||
#define TRACE_SYSTEM host1x
|
||||
|
||||
#if !defined(_TRACE_HOST1X_H) || defined(TRACE_HEADER_MULTI_READ)
|
||||
#define _TRACE_HOST1X_H
|
||||
|
||||
#include <linux/ktime.h>
|
||||
#include <linux/tracepoint.h>
|
||||
|
||||
DECLARE_EVENT_CLASS(host1x,
|
||||
TP_PROTO(const char *name),
|
||||
TP_ARGS(name),
|
||||
TP_STRUCT__entry(__field(const char *, name)),
|
||||
TP_fast_assign(__entry->name = name;),
|
||||
TP_printk("name=%s", __entry->name)
|
||||
);
|
||||
|
||||
TRACE_EVENT(host1x_syncpt_load_min,
|
||||
TP_PROTO(u32 id, u32 val),
|
||||
|
||||
TP_ARGS(id, val),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__field(u32, id)
|
||||
__field(u32, val)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__entry->id = id;
|
||||
__entry->val = val;
|
||||
),
|
||||
|
||||
TP_printk("id=%d, val=%d", __entry->id, __entry->val)
|
||||
);
|
||||
|
||||
#endif /* _TRACE_HOST1X_H */
|
||||
|
||||
/* This part must be outside protection */
|
||||
#include <trace/define_trace.h>
|
||||
Loading…
Reference in New Issue