mirror of https://gitee.com/openkylin/linux.git
thermal: exynos: remove test_mux pdata field
Replace pdata->test_mux check in get_con_reg() by explicitly checking for SoC type. Also since the used pdata->test_mux value is always identical use it directly and remove pdata->test_mux completely. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -193,8 +193,9 @@ static u32 get_con_reg(struct exynos_tmu_data *data, u32 con)
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{
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struct exynos_tmu_platform_data *pdata = data->pdata;
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if (pdata->test_mux)
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con |= (pdata->test_mux << EXYNOS4412_MUX_ADDR_SHIFT);
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if (data->soc == SOC_ARCH_EXYNOS4412 ||
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data->soc == SOC_ARCH_EXYNOS3250)
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con |= (EXYNOS4412_MUX_ADDR_VALUE << EXYNOS4412_MUX_ADDR_SHIFT);
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con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK << EXYNOS_TMU_REF_VOLTAGE_SHIFT);
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con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;
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@ -89,7 +89,6 @@ enum soc_type {
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* @first_point_trim: temp value of the first point trimming
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* @second_point_trim: temp value of the second point trimming
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* @default_temp_offset: default temperature offset in case of no trimming
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* @test_mux; information if SoC supports test MUX
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* @cal_type: calibration type for temperature
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* @freq_clip_table: Table representing frequency reduction percentage.
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* @freq_tab_count: Count of the above table as frequency reduction may
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@ -115,7 +114,6 @@ struct exynos_tmu_platform_data {
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u8 first_point_trim;
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u8 second_point_trim;
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u8 default_temp_offset;
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u8 test_mux;
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enum calibration_type cal_type;
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enum soc_type type;
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@ -109,7 +109,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
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{
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EXYNOS3250_TMU_DATA,
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.type = SOC_ARCH_EXYNOS3250,
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.test_mux = EXYNOS4412_MUX_ADDR_VALUE,
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},
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},
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.tmu_count = 1,
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@ -160,7 +159,6 @@ struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
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{
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EXYNOS4412_TMU_DATA,
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.type = SOC_ARCH_EXYNOS4412,
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.test_mux = EXYNOS4412_MUX_ADDR_VALUE,
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},
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},
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.tmu_count = 1,
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