mirror of https://gitee.com/openkylin/linux.git
x86: Handle HW IOMMU initialization failure gracefully
If HW IOMMU initialization fails (Intel VT-d often does this, typically due to BIOS bugs), we fall back to nommu. It doesn't work for the majority since nowadays we have more than 4GB memory so we must use swiotlb instead of nommu. The problem is that it's too late to initialize swiotlb when HW IOMMU initialization fails. We need to allocate swiotlb memory earlier from bootmem allocator. Chris explained the issue in detail: http://marc.info/?l=linux-kernel&m=125657444317079&w=2 The current x86 IOMMU initialization sequence is too complicated and handling the above issue makes it more hacky. This patch changes x86 IOMMU initialization sequence to handle the above issue cleanly. The new x86 IOMMU initialization sequence are: 1. we initialize the swiotlb (and setting swiotlb to 1) in the case of (max_pfn > MAX_DMA32_PFN && !no_iommu). dma_ops is set to swiotlb_dma_ops or nommu_dma_ops. if swiotlb usage is forced by the boot option, we finish here. 2. we call the detection functions of all the IOMMUs 3. the detection function sets x86_init.iommu.iommu_init to the IOMMU initialization function (so we can avoid calling the initialization functions of all the IOMMUs needlessly). 4. if the IOMMU initialization function doesn't need to swiotlb then sets swiotlb to zero (e.g. the initialization is sucessful). 5. if we find that swiotlb is set to zero, we free swiotlb resource. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: chrisw@sous-sol.org Cc: dwmw2@infradead.org Cc: joerg.roedel@amd.com Cc: muli@il.ibm.com LKML-Reference: <1257849980-22640-10-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -2,7 +2,6 @@
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#define _ASM_X86_IOMMU_H
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static inline void iommu_shutdown_noop(void) {}
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extern void no_iommu_init(void);
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extern struct dma_map_ops nommu_dma_ops;
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extern int force_iommu, no_iommu;
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extern int iommu_detected;
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@ -2110,8 +2110,8 @@ int __init amd_iommu_init_dma_ops(void)
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prealloc_protection_domains();
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iommu_detected = 1;
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force_iommu = 1;
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bad_dma_address = 0;
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swiotlb = 0;
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#ifdef CONFIG_GART_IOMMU
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gart_iommu_aperture_disabled = 1;
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gart_iommu_aperture = 0;
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@ -1330,7 +1330,7 @@ static int __init early_amd_iommu_detect(struct acpi_table_header *table)
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void __init amd_iommu_detect(void)
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{
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if (swiotlb || no_iommu || (iommu_detected && !gart_iommu_aperture))
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if (no_iommu || (iommu_detected && !gart_iommu_aperture))
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return;
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if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) {
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@ -458,7 +458,7 @@ void __init gart_iommu_hole_init(void)
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if (aper_alloc) {
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/* Got the aperture from the AGP bridge */
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} else if (swiotlb && !valid_agp) {
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} else if (!valid_agp) {
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/* Do nothing */
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} else if ((!no_iommu && max_pfn > MAX_DMA32_PFN) ||
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force_iommu ||
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@ -1360,7 +1360,7 @@ void __init detect_calgary(void)
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* if the user specified iommu=off or iommu=soft or we found
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* another HW IOMMU already, bail out.
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*/
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if (swiotlb || no_iommu || iommu_detected)
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if (no_iommu || iommu_detected)
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return;
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if (!use_calgary)
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@ -1445,10 +1445,6 @@ void __init detect_calgary(void)
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printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d\n",
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specified_table_size);
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/* swiotlb for devices that aren't behind the Calgary. */
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if (max_pfn > MAX_DMA32_PFN)
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swiotlb = 1;
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x86_init.iommu.iommu_init = calgary_iommu_init;
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}
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return;
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@ -1476,11 +1472,7 @@ int __init calgary_iommu_init(void)
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return ret;
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}
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force_iommu = 1;
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bad_dma_address = 0x0;
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/* dma_ops is set to swiotlb or nommu */
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if (!dma_ops)
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dma_ops = &nommu_dma_ops;
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return 0;
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}
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@ -124,24 +124,24 @@ static void __init dma32_free_bootmem(void)
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void __init pci_iommu_alloc(void)
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{
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/* swiotlb is forced by the boot option */
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int use_swiotlb = swiotlb;
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#ifdef CONFIG_X86_64
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/* free the range so iommu could get some range less than 4G */
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dma32_free_bootmem();
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#endif
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pci_swiotlb_init();
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if (use_swiotlb)
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return;
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/*
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* The order of these functions is important for
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* fall-back/fail-over reasons
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*/
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gart_iommu_hole_init();
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detect_calgary();
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detect_intel_iommu();
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/* needs to be called after gart_iommu_hole_init */
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amd_iommu_detect();
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pci_swiotlb_init();
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}
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void *dma_generic_alloc_coherent(struct device *dev, size_t size,
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@ -291,10 +291,15 @@ static int __init pci_iommu_init(void)
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#ifdef CONFIG_PCI
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dma_debug_add_bus(&pci_bus_type);
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#endif
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x86_init.iommu.iommu_init();
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no_iommu_init();
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if (swiotlb) {
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printk(KERN_INFO "PCI-DMA: "
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"Using software bounce buffering for IO (SWIOTLB)\n");
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swiotlb_print_info();
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} else
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swiotlb_free();
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return 0;
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}
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/* Must execute after PCI subsystem */
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@ -833,6 +833,7 @@ int __init gart_iommu_init(void)
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flush_gart();
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dma_ops = &gart_dma_ops;
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x86_platform.iommu_shutdown = gart_iommu_shutdown;
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swiotlb = 0;
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return 0;
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}
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@ -103,12 +103,3 @@ struct dma_map_ops nommu_dma_ops = {
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.sync_sg_for_device = nommu_sync_sg_for_device,
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.is_phys = 1,
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};
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void __init no_iommu_init(void)
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{
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if (dma_ops)
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return;
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force_iommu = 0; /* no HW IOMMU */
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dma_ops = &nommu_dma_ops;
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}
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@ -46,13 +46,12 @@ void __init pci_swiotlb_init(void)
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{
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/* don't initialize swiotlb if iommu=off (no_iommu=1) */
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#ifdef CONFIG_X86_64
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if ((!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN))
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if (!no_iommu && max_pfn > MAX_DMA32_PFN)
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swiotlb = 1;
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#endif
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if (swiotlb_force)
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swiotlb = 1;
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if (swiotlb) {
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swiotlb_init(0);
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dma_ops = &swiotlb_dma_ops;
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}
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} else
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dma_ops = &nommu_dma_ops;
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}
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@ -613,8 +613,7 @@ void __init detect_intel_iommu(void)
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"x2apic and Intr-remapping.\n");
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#endif
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#ifdef CONFIG_DMAR
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if (ret && !no_iommu && !iommu_detected && !swiotlb &&
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!dmar_disabled)
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if (ret && !no_iommu && !iommu_detected && !dmar_disabled)
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iommu_detected = 1;
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#endif
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#ifdef CONFIG_X86
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@ -3231,7 +3231,7 @@ int __init intel_iommu_init(void)
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* Check the need for DMA-remapping initialization now.
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* Above initialization will also be used by Interrupt-remapping.
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*/
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if (no_iommu || swiotlb || dmar_disabled)
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if (no_iommu || dmar_disabled)
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return -ENODEV;
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iommu_init_mempool();
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@ -3252,7 +3252,9 @@ int __init intel_iommu_init(void)
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"PCI-DMA: Intel(R) Virtualization Technology for Directed I/O\n");
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init_timer(&unmap_timer);
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force_iommu = 1;
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#ifdef CONFIG_SWIOTLB
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swiotlb = 0;
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#endif
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dma_ops = &intel_dma_ops;
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init_iommu_sysfs();
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@ -109,8 +109,10 @@ setup_io_tlb_npages(char *str)
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}
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if (*str == ',')
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++str;
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if (!strcmp(str, "force"))
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if (!strcmp(str, "force")) {
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swiotlb_force = 1;
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swiotlb = 1;
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}
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return 1;
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}
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__setup("swiotlb=", setup_io_tlb_npages);
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