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ARM: dts: aspeed: Add LPC clock phandles 

The LPC device uses LCLK.

Tested-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Joel Stanley 2018-02-12 18:13:23 +10:30
parent 542d2f4588
commit 7674bf96b8
2 changed files with 2 additions and 0 deletions
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1
arch/arm/boot/dts/aspeed-g4.dtsi
View File

@ -233,6 +233,7 @@ lpc_host: lpc-host@80 {
lpc_ctrl: lpc-ctrl@0 { lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2400-lpc-ctrl"; compatible = "aspeed,ast2400-lpc-ctrl";
reg = <0x0 0x80>; reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled"; status = "disabled";
}; };

1
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -283,6 +283,7 @@ lpc_host: lpc-host@80 {
lpc_ctrl: lpc-ctrl@0 { lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2500-lpc-ctrl"; compatible = "aspeed,ast2500-lpc-ctrl";
reg = <0x0 0x80>; reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled"; status = "disabled";
}; };