mirror of https://gitee.com/openkylin/linux.git
ASoC: Intel: Skylake: Await purge request ack on CNL
Each purge request is sent by driver after master core is powered up and
unresetted but before it is unstalled. On unstall, ROM begins processing
the request and initializing environment for FW load. Host should await
ROM's ack before moving forward. Without doing so, ROM init poll may
start too early and false timeouts can occur.
Fixes: cb6a552846
("ASoC: Intel: cnl: Add sst library functions for cnl platform")
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200305145314.32579-8-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
024aa45f55
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7693cadac8
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@ -17,7 +17,6 @@
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#include "skl.h"
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#define BXT_BASEFW_TIMEOUT 3000
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#define BXT_INIT_TIMEOUT 300
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#define BXT_ROM_INIT_TIMEOUT 70
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#define BXT_IPC_PURGE_FW 0x01004000
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@ -57,18 +57,34 @@ static int cnl_prepare_fw(struct sst_dsp *ctx, const void *fwdata, u32 fwsize)
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ctx->dsp_ops.stream_tag = stream_tag;
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memcpy(ctx->dmab.area, fwdata, fwsize);
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ret = skl_dsp_core_power_up(ctx, SKL_DSP_CORE0_MASK);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp core0 power up failed\n");
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ret = -EIO;
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goto base_fw_load_failed;
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}
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/* purge FW request */
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sst_dsp_shim_write(ctx, CNL_ADSP_REG_HIPCIDR,
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CNL_ADSP_REG_HIPCIDR_BUSY | (CNL_IPC_PURGE |
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((stream_tag - 1) << CNL_ROM_CTRL_DMA_ID)));
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ret = cnl_dsp_enable_core(ctx, SKL_DSP_CORE0_MASK);
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ret = skl_dsp_start_core(ctx, SKL_DSP_CORE0_MASK);
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if (ret < 0) {
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dev_err(ctx->dev, "dsp boot core failed ret: %d\n", ret);
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dev_err(ctx->dev, "Start dsp core failed ret: %d\n", ret);
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ret = -EIO;
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goto base_fw_load_failed;
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}
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ret = sst_dsp_register_poll(ctx, CNL_ADSP_REG_HIPCIDA,
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CNL_ADSP_REG_HIPCIDA_DONE,
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CNL_ADSP_REG_HIPCIDA_DONE,
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BXT_INIT_TIMEOUT, "HIPCIDA Done");
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if (ret < 0) {
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dev_err(ctx->dev, "timeout for purge request: %d\n", ret);
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goto base_fw_load_failed;
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}
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/* enable interrupt */
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cnl_ipc_int_enable(ctx);
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cnl_ipc_op_int_enable(ctx);
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@ -68,6 +68,7 @@ struct skl_dev;
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#define SKL_FW_INIT 0x1
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#define SKL_FW_RFW_START 0xf
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#define BXT_FW_ROM_INIT_RETRY 3
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#define BXT_INIT_TIMEOUT 300
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#define SKL_ADSPIC_IPC 1
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#define SKL_ADSPIS_IPC 1
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