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arm64: dts: r8a7795: tidyup audma definition order
Current r8a7795.dtsi defines audma -> ipmmu -> dma order. Because of this order, dma can connect to ipmmu, but audma can't connect to it. This patch moves audma order as ipmmu -> dma -> audma. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -340,72 +340,6 @@ sysc: system-controller@e6180000 {
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#power-domain-cells = <1>;
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};
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audma0: dma-controller@ec700000 {
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xec700000 0 0x10000>;
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interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 502>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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audma1: dma-controller@ec720000 {
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xec720000 0 0x10000>;
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interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 501>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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pfc: pfc@e6060000 {
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compatible = "renesas,pfc-r8a7795";
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reg = <0 0xe6060000 0 0x50c>;
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@ -525,6 +459,72 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
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dma-channels = <16>;
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};
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audma0: dma-controller@ec700000 {
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xec700000 0 0x10000>;
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interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 502>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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audma1: dma-controller@ec720000 {
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xec720000 0 0x10000>;
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interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD 501>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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avb: ethernet@e6800000 {
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compatible = "renesas,etheravb-r8a7795",
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"renesas,etheravb-rcar-gen3";
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