mirror of https://gitee.com/openkylin/linux.git
bna: Naming Change and Minor Macro Fix
Naming changes: rename devid, BNAD_MAX_TXS, BNAD_MAX_RXS, BNAD_MAX_RXPS_PER_RX to device, BNAD_MAX_TX, BNAD_MAX_RX, BNAD_MAX_RXP_PER_RX respectively and change all the references. Macro Fix: Add ioc_isr_mod_set check to bfa_nw_ioc_mbox_regisr macro Signed-off-by: Gurunatha Karaje <gkaraje@brocade.com> Signed-off-by: Rasesh Mody <rmody@brocade.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -251,10 +251,10 @@ struct bfa_mfg_block {
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* ---------------------- pci definitions ------------
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*/
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#define bfa_asic_id_ct(devid) \
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((devid) == PCI_DEVICE_ID_BROCADE_CT || \
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(devid) == PCI_DEVICE_ID_BROCADE_CT_FC)
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#define bfa_asic_id_ctc(devid) (bfa_asic_id_ct(devid))
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#define bfa_asic_id_ct(device) \
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((device) == PCI_DEVICE_ID_BROCADE_CT || \
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(device) == PCI_DEVICE_ID_BROCADE_CT_FC)
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#define bfa_asic_id_ctc(device) (bfa_asic_id_ct(device))
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enum bfa_mode {
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BFA_MODE_HBA = 1,
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@ -274,8 +274,10 @@ void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
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((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
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(__ioc)->asic_mode))
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#define bfa_ioc_isr_mode_set(__ioc, __msix) \
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((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix))
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#define bfa_ioc_isr_mode_set(__ioc, __msix) do { \
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if ((__ioc)->ioc_hwif->ioc_isr_mode_set) \
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((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix)); \
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} while (0)
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#define bfa_ioc_ownership_reset(__ioc) \
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((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
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@ -1001,7 +1001,7 @@ bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)
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mdelay(BNAD_TXRX_SYNC_MDELAY);
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for (i = 0; i < BNAD_MAX_RXPS_PER_RX; i++) {
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for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
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rx_ctrl = &rx_info->rx_ctrl[i];
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ccb = rx_ctrl->ccb;
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if (!ccb)
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@ -1030,7 +1030,7 @@ bnad_cb_rx_post(struct bnad *bnad, struct bna_rx *rx)
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int i;
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int j;
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for (i = 0; i < BNAD_MAX_RXPS_PER_RX; i++) {
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for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
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rx_ctrl = &rx_info->rx_ctrl[i];
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ccb = rx_ctrl->ccb;
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if (!ccb)
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@ -2227,7 +2227,7 @@ bnad_q_num_init(struct bnad *bnad)
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int rxps;
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rxps = min((uint)num_online_cpus(),
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(uint)(BNAD_MAX_RXS * BNAD_MAX_RXPS_PER_RX));
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(uint)(BNAD_MAX_RX * BNAD_MAX_RXP_PER_RX));
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if (!(bnad->cfg_flags & BNAD_CF_MSIX))
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rxps = 1; /* INTx */
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@ -38,12 +38,12 @@
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#define BNAD_TXQ_DEPTH 2048
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#define BNAD_RXQ_DEPTH 2048
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#define BNAD_MAX_TXS 1
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#define BNAD_MAX_TX 1
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#define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */
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#define BNAD_TXQ_NUM 1
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#define BNAD_MAX_RXS 1
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#define BNAD_MAX_RXPS_PER_RX 16
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#define BNAD_MAX_RX 1
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#define BNAD_MAX_RXP_PER_RX 16
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#define BNAD_MAX_RXQ_PER_RXP 2
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/*
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@ -190,7 +190,7 @@ struct bnad_tx_info {
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struct bnad_rx_info {
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struct bna_rx *rx; /* 1:1 between rx_info & rx */
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struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX];
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struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
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u32 rx_id;
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} ____cacheline_aligned;
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@ -234,8 +234,8 @@ struct bnad {
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struct net_device *netdev;
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/* Data path */
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struct bnad_tx_info tx_info[BNAD_MAX_TXS];
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struct bnad_rx_info rx_info[BNAD_MAX_RXS];
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struct bnad_tx_info tx_info[BNAD_MAX_TX];
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struct bnad_rx_info rx_info[BNAD_MAX_RX];
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
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/*
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@ -255,8 +255,8 @@ struct bnad {
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u8 tx_coalescing_timeo;
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u8 rx_coalescing_timeo;
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struct bna_rx_config rx_config[BNAD_MAX_RXS];
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struct bna_tx_config tx_config[BNAD_MAX_TXS];
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struct bna_rx_config rx_config[BNAD_MAX_RX];
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struct bna_tx_config tx_config[BNAD_MAX_TX];
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void __iomem *bar0; /* BAR0 address */
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@ -283,8 +283,8 @@ struct bnad {
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/* Control path resources, memory & irq */
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struct bna_res_info res_info[BNA_RES_T_MAX];
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struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
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struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS];
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struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS];
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struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
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struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
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struct bnad_completion bnad_completions;
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