openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

ARM: dts: rockchip: add the thermal main info found on rk3228 

This patch adds the thermal needed main information for rk3228 SoCS.

Basically has the following content:

1) TSADC controller:
Add the needed attributes for rk3036 TSADC controller.

Especially for the TSHUT, in some cases if we are unable to shut it down
in orderly fashion (says: kernel is stuck holding a lock or similar), then
hardware TSHUT will reset it.
If the temperature is over 95C over a period of time the thermal shutdown
of the tsadc is invoked with can either reset the entire chip via the CRU,
or notify the PMIC via a GPIO. This should be set in the specific board.

2) Thermal zones:
Add the needed device mode for thermal generic framework.
Detail in Documentation/devicetree/bindings/thermal/thermal.txt.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Caesar Wang 2016-02-15 15:33:32 +08:00 committed by Heiko Stuebner
parent fe95effb4c
commit 7796031eec
1 changed files with 69 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

69
arch/arm/boot/dts/rk3228.dtsi
View File

@ -43,6 +43,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rk3228-cru.h> #include <dt-bindings/clock/rk3228-cru.h>
#include <dt-bindings/thermal/thermal.h>
#include "skeleton.dtsi" #include "skeleton.dtsi"
/ { / {
@ -69,6 +70,7 @@ cpu0: cpu@f00 {
/* KHz uV */ /* KHz uV */
816000 1000000 816000 1000000
>; >;
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>; clock-latency = <40000>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
}; };
@ -247,6 +249,63 @@ cru: clock-controller@110e0000 {
assigned-clock-rates = <594000000>; assigned-clock-rates = <594000000>;
}; };
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&tsadc 0>;
trips {
cpu_alert0: cpu_alert0 {
temperature = <70000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_alert1: cpu_alert1 {
temperature = <75000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT 6>;
};
map1 {
trip = <&cpu_alert1>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
tsadc: tsadc@11150000 {
compatible = "rockchip,rk3228-tsadc";
reg = <0x11150000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&otp_gpio>;
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <0>;
rockchip,hw-tshut-temp = <95000>;
status = "disabled";
};
emmc: dwmmc@30020000 { emmc: dwmmc@30020000 {
compatible = "rockchip,rk3288-dw-mshc"; compatible = "rockchip,rk3288-dw-mshc";
reg = <0x30020000 0x4000>; reg = <0x30020000 0x4000>;
@ -394,6 +453,16 @@ pwm3_pin: pwm3-pin {
}; };
}; };
tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
rockchip,pins = <0 24 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart0 { uart0 {
uart0_xfer: uart0-xfer { uart0_xfer: uart0-xfer {
rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>, rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,