mirror of https://gitee.com/openkylin/linux.git
Staging/IIO fixes for 4.16-rc2
Here are a small number of staging and iio driver fixes for 4.16-rc2. The IIO fixes are all for reported things, and the android driver fixes also resolve some reported problems. The remaining fsl-mc Kconfig change resolves a build testing error that Arnd reported. All of these have been in linux-next with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWo62hg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymTsgCg0xEZDChQWSypqA7mw6/0c18iitkAoIyAtoST 4I0CZwJ/rXtSpmZds8MT =Repf -----END PGP SIGNATURE----- Merge tag 'staging-4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO fixes from Greg KH: "Here are a small number of staging and iio driver fixes for 4.16-rc2. The IIO fixes are all for reported things, and the android driver fixes also resolve some reported problems. The remaining fsl-mc Kconfig change resolves a build testing error that Arnd reported. All of these have been in linux-next with no reported issues" * tag 'staging-4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: iio: buffer: check if a buffer has been set up when poll is called iio: adis_lib: Initialize trigger before requesting interrupt staging: android: ion: Zero CMA allocated memory staging: android: ashmem: Fix a race condition in pin ioctls staging: fsl-mc: fix build testing on x86 iio: srf08: fix link error "devm_iio_triggered_buffer_setup" undefined staging: iio: ad5933: switch buffer mode to software iio: adc: stm32: fix stm32h7_adc_enable error handling staging: iio: adc: ad7192: fix external frequency setting iio: adc: aspeed: Fix error handling path
This commit is contained in:
commit
77f892eb46
|
@ -243,7 +243,7 @@ static int aspeed_adc_probe(struct platform_device *pdev)
|
|||
ASPEED_ADC_INIT_POLLING_TIME,
|
||||
ASPEED_ADC_INIT_TIMEOUT);
|
||||
if (ret)
|
||||
goto scaler_error;
|
||||
goto poll_timeout_error;
|
||||
}
|
||||
|
||||
/* Start all channels in normal mode. */
|
||||
|
@ -274,9 +274,10 @@ static int aspeed_adc_probe(struct platform_device *pdev)
|
|||
writel(ASPEED_OPERATION_MODE_POWER_DOWN,
|
||||
data->base + ASPEED_REG_ENGINE_CONTROL);
|
||||
clk_disable_unprepare(data->clk_scaler->clk);
|
||||
reset_error:
|
||||
reset_control_assert(data->rst);
|
||||
clk_enable_error:
|
||||
poll_timeout_error:
|
||||
reset_control_assert(data->rst);
|
||||
reset_error:
|
||||
clk_hw_unregister_divider(data->clk_scaler);
|
||||
scaler_error:
|
||||
clk_hw_unregister_divider(data->clk_prescaler);
|
||||
|
|
|
@ -722,8 +722,6 @@ static int stm32h7_adc_enable(struct stm32_adc *adc)
|
|||
int ret;
|
||||
u32 val;
|
||||
|
||||
/* Clear ADRDY by writing one, then enable ADC */
|
||||
stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
|
||||
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
|
||||
|
||||
/* Poll for ADRDY to be set (after adc startup time) */
|
||||
|
@ -731,8 +729,11 @@ static int stm32h7_adc_enable(struct stm32_adc *adc)
|
|||
val & STM32H7_ADRDY,
|
||||
100, STM32_ADC_TIMEOUT_US);
|
||||
if (ret) {
|
||||
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
|
||||
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
|
||||
dev_err(&indio_dev->dev, "Failed to enable ADC\n");
|
||||
} else {
|
||||
/* Clear ADRDY by writing one */
|
||||
stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -46,6 +46,10 @@ int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
|
|||
if (adis->trig == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
adis->trig->dev.parent = &adis->spi->dev;
|
||||
adis->trig->ops = &adis_trigger_ops;
|
||||
iio_trigger_set_drvdata(adis->trig, adis);
|
||||
|
||||
ret = request_irq(adis->spi->irq,
|
||||
&iio_trigger_generic_data_rdy_poll,
|
||||
IRQF_TRIGGER_RISING,
|
||||
|
@ -54,9 +58,6 @@ int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev)
|
|||
if (ret)
|
||||
goto error_free_trig;
|
||||
|
||||
adis->trig->dev.parent = &adis->spi->dev;
|
||||
adis->trig->ops = &adis_trigger_ops;
|
||||
iio_trigger_set_drvdata(adis->trig, adis);
|
||||
ret = iio_trigger_register(adis->trig);
|
||||
|
||||
indio_dev->trig = iio_trigger_get(adis->trig);
|
||||
|
|
|
@ -175,7 +175,7 @@ __poll_t iio_buffer_poll(struct file *filp,
|
|||
struct iio_dev *indio_dev = filp->private_data;
|
||||
struct iio_buffer *rb = indio_dev->buffer;
|
||||
|
||||
if (!indio_dev->info)
|
||||
if (!indio_dev->info || rb == NULL)
|
||||
return 0;
|
||||
|
||||
poll_wait(filp, &rb->pollq, wait);
|
||||
|
|
|
@ -68,6 +68,8 @@ config SX9500
|
|||
|
||||
config SRF08
|
||||
tristate "Devantech SRF02/SRF08/SRF10 ultrasonic ranger sensor"
|
||||
select IIO_BUFFER
|
||||
select IIO_TRIGGERED_BUFFER
|
||||
depends on I2C
|
||||
help
|
||||
Say Y here to build a driver for Devantech SRF02/SRF08/SRF10
|
||||
|
|
|
@ -702,30 +702,32 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
|
|||
size_t pgstart, pgend;
|
||||
int ret = -EINVAL;
|
||||
|
||||
if (unlikely(!asma->file))
|
||||
return -EINVAL;
|
||||
mutex_lock(&ashmem_mutex);
|
||||
|
||||
if (unlikely(copy_from_user(&pin, p, sizeof(pin))))
|
||||
return -EFAULT;
|
||||
if (unlikely(!asma->file))
|
||||
goto out_unlock;
|
||||
|
||||
if (unlikely(copy_from_user(&pin, p, sizeof(pin)))) {
|
||||
ret = -EFAULT;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
/* per custom, you can pass zero for len to mean "everything onward" */
|
||||
if (!pin.len)
|
||||
pin.len = PAGE_ALIGN(asma->size) - pin.offset;
|
||||
|
||||
if (unlikely((pin.offset | pin.len) & ~PAGE_MASK))
|
||||
return -EINVAL;
|
||||
goto out_unlock;
|
||||
|
||||
if (unlikely(((__u32)-1) - pin.offset < pin.len))
|
||||
return -EINVAL;
|
||||
goto out_unlock;
|
||||
|
||||
if (unlikely(PAGE_ALIGN(asma->size) < pin.offset + pin.len))
|
||||
return -EINVAL;
|
||||
goto out_unlock;
|
||||
|
||||
pgstart = pin.offset / PAGE_SIZE;
|
||||
pgend = pgstart + (pin.len / PAGE_SIZE) - 1;
|
||||
|
||||
mutex_lock(&ashmem_mutex);
|
||||
|
||||
switch (cmd) {
|
||||
case ASHMEM_PIN:
|
||||
ret = ashmem_pin(asma, pgstart, pgend);
|
||||
|
@ -738,6 +740,7 @@ static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
|
|||
break;
|
||||
}
|
||||
|
||||
out_unlock:
|
||||
mutex_unlock(&ashmem_mutex);
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/cma.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/highmem.h>
|
||||
|
||||
#include "ion.h"
|
||||
|
||||
|
@ -42,6 +43,22 @@ static int ion_cma_allocate(struct ion_heap *heap, struct ion_buffer *buffer,
|
|||
if (!pages)
|
||||
return -ENOMEM;
|
||||
|
||||
if (PageHighMem(pages)) {
|
||||
unsigned long nr_clear_pages = nr_pages;
|
||||
struct page *page = pages;
|
||||
|
||||
while (nr_clear_pages > 0) {
|
||||
void *vaddr = kmap_atomic(page);
|
||||
|
||||
memset(vaddr, 0, PAGE_SIZE);
|
||||
kunmap_atomic(vaddr);
|
||||
page++;
|
||||
nr_clear_pages--;
|
||||
}
|
||||
} else {
|
||||
memset(page_address(pages), 0, size);
|
||||
}
|
||||
|
||||
table = kmalloc(sizeof(*table), GFP_KERNEL);
|
||||
if (!table)
|
||||
goto err;
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
|
||||
config FSL_MC_BUS
|
||||
bool "QorIQ DPAA2 fsl-mc bus driver"
|
||||
depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86 || PPC)))
|
||||
depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC)))
|
||||
select GENERIC_MSI_IRQ_DOMAIN
|
||||
help
|
||||
Driver to enable the bus infrastructure for the QorIQ DPAA2
|
||||
|
|
|
@ -141,6 +141,8 @@
|
|||
#define AD7192_GPOCON_P1DAT BIT(1) /* P1 state */
|
||||
#define AD7192_GPOCON_P0DAT BIT(0) /* P0 state */
|
||||
|
||||
#define AD7192_EXT_FREQ_MHZ_MIN 2457600
|
||||
#define AD7192_EXT_FREQ_MHZ_MAX 5120000
|
||||
#define AD7192_INT_FREQ_MHZ 4915200
|
||||
|
||||
/* NOTE:
|
||||
|
@ -218,6 +220,12 @@ static int ad7192_calibrate_all(struct ad7192_state *st)
|
|||
ARRAY_SIZE(ad7192_calib_arr));
|
||||
}
|
||||
|
||||
static inline bool ad7192_valid_external_frequency(u32 freq)
|
||||
{
|
||||
return (freq >= AD7192_EXT_FREQ_MHZ_MIN &&
|
||||
freq <= AD7192_EXT_FREQ_MHZ_MAX);
|
||||
}
|
||||
|
||||
static int ad7192_setup(struct ad7192_state *st,
|
||||
const struct ad7192_platform_data *pdata)
|
||||
{
|
||||
|
@ -243,17 +251,20 @@ static int ad7192_setup(struct ad7192_state *st,
|
|||
id);
|
||||
|
||||
switch (pdata->clock_source_sel) {
|
||||
case AD7192_CLK_EXT_MCLK1_2:
|
||||
case AD7192_CLK_EXT_MCLK2:
|
||||
st->mclk = AD7192_INT_FREQ_MHZ;
|
||||
break;
|
||||
case AD7192_CLK_INT:
|
||||
case AD7192_CLK_INT_CO:
|
||||
if (pdata->ext_clk_hz)
|
||||
st->mclk = pdata->ext_clk_hz;
|
||||
else
|
||||
st->mclk = AD7192_INT_FREQ_MHZ;
|
||||
st->mclk = AD7192_INT_FREQ_MHZ;
|
||||
break;
|
||||
case AD7192_CLK_EXT_MCLK1_2:
|
||||
case AD7192_CLK_EXT_MCLK2:
|
||||
if (ad7192_valid_external_frequency(pdata->ext_clk_hz)) {
|
||||
st->mclk = pdata->ext_clk_hz;
|
||||
break;
|
||||
}
|
||||
dev_err(&st->sd.spi->dev, "Invalid frequency setting %u\n",
|
||||
pdata->ext_clk_hz);
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
|
|
|
@ -648,8 +648,6 @@ static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
|
|||
/* Ring buffer functions - here trigger setup related */
|
||||
indio_dev->setup_ops = &ad5933_ring_setup_ops;
|
||||
|
||||
indio_dev->modes |= INDIO_BUFFER_HARDWARE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -762,7 +760,7 @@ static int ad5933_probe(struct i2c_client *client,
|
|||
indio_dev->dev.parent = &client->dev;
|
||||
indio_dev->info = &ad5933_info;
|
||||
indio_dev->name = id->name;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
|
||||
indio_dev->channels = ad5933_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
|
||||
|
||||
|
|
Loading…
Reference in New Issue