Renesas ARM64 Based SoC DT PM Domain Updates for v4.7

* Add SYSC PM Domains to DT of r8a7795 SoC
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXIDwyAAoJENfPZGlqN0++vP4QAJJPuJifEDcWkbK2dDz3ikPM
 8kvLt5DIBLT1E7bt2ToLfukBH07uhYQ8UdgNl7xLHjTX8lupXH5oVcyxZ+pB1mmy
 iQdSVR/WFXakJUhLrsph9QM9X1r+g1AM4a2NcZTS5CSQpIaX30guharMiuj5aPkF
 3fco0h1sofYjtjDMeUAp743NoVjQl6aehLkgoIQ2+SDoRjlLtcXKjisLwWKx34ST
 MmlipU3GGe1SzLyYUVrlKR5KvS1WiZw4TqgxZ35OJBopcjMxBAjQGluaaMlhleM4
 I9llyltTcyHcSNpu6fx31Jj50blVpwTbwN4r//UrgJZN+41NN8betn97TYSgTcUw
 06nYDDADWtrnWrrewwS0rAZcUn/Q6M7sh/PrjHD0RrjlQ1yiuJKbODYvAN8ttKtU
 YHX0pWtBlk565JelhRFBkuLTZqMHHgCGF54qxGDfTIq+fJIiSbSftqGyISSL33O6
 OUCldPi1d7H9d1JXLjbDyOD2DnbItygxVBbEfAMHUHnXuJHfyV1FGvJK4rcjJh7h
 IXInfBIEvccUqEbOQ8wZBvg12k3c5s5CgS6d3KQtsybj9k9Hyn05oZyPzwR7pQDb
 ra6hzlKDy5JC/4G8iNUZ9rzTtBdoBQS4Ja46cjVMNVuEMeXtJ6fsHyR2uQMWnVF9
 j8RxmTDBm/l9asyamkqD
 =LT6x
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm64-dt-pm-domain-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late

Merge "Renesas ARM64 Based SoC DT PM Domain Updates for v4.7" from Simon Horman:

* Add SYSC PM Domains to DT of r8a7795 SoC

* tag 'renesas-arm64-dt-pm-domain-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Use SYSC "always-on" PM Domain
  arm64: dts: r8a7795: Add SYSC PM Domains
  arm64: dts: r8a7795: Don't disable referenced optional clocks
  arm64: dts: salvator-x: populate EXTALR
  arm64: dts: r8a7795: enable PCIe on Salvator-X
  arm64: dts: r8a7795: Add PCIe nodes
  arm64: dts: r8a7795: Use USB3.0 fallback compatibility string
  arm64: dts: r8a7795: Add CAN support
  arm64: dts: r8a7795: Add CAN external clock support
This commit is contained in:
Arnd Bergmann 2016-05-09 15:39:00 +02:00
commit 783fb3c393
2 changed files with 176 additions and 54 deletions

View File

@ -141,6 +141,10 @@ &extal_clk {
clock-frequency = <16666666>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
@ -388,3 +392,16 @@ &ohci1 {
&ohci2 {
status = "okay";
};
&pcie_bus_clk {
clock-frequency = <100000000>;
status = "okay";
};
&pciec0 {
status = "okay";
};
&pciec1 {
status = "okay";
};

View File

@ -10,6 +10,7 @@
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7795-sysc.h>
/ {
compatible = "renesas,r8a7795";
@ -39,6 +40,7 @@ a57_0: cpu@0 {
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@ -47,6 +49,7 @@ a57_1: cpu@1 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x1>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@ -54,6 +57,7 @@ a57_2: cpu@2 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x2>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@ -61,6 +65,7 @@ a57_3: cpu@3 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x3>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@ -68,12 +73,14 @@ a57_3: cpu@3 {
L2_CA57: cache-controller@0 {
compatible = "cache";
power-domains = <&sysc R8A7795_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA53: cache-controller@1 {
compatible = "cache";
power-domains = <&sysc R8A7795_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@ -115,12 +122,25 @@ audio_clk_c: audio_clk_c {
clock-frequency = <0>;
};
/* External CAN clock - to be overridden by boards that provide it */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External SCIF clock - to be overridden by boards that provide it */
scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
status = "disabled";
};
/* External PCIe clock - can be overridden by the board */
pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
soc {
@ -155,7 +175,7 @@ gpio0: gpio@e6050000 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@ -169,7 +189,7 @@ gpio1: gpio@e6051000 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@ -183,7 +203,7 @@ gpio2: gpio@e6052000 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@ -197,7 +217,7 @@ gpio3: gpio@e6053000 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@ -211,7 +231,7 @@ gpio4: gpio@e6054000 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@ -225,7 +245,7 @@ gpio5: gpio@e6055000 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@ -239,7 +259,7 @@ gpio6: gpio@e6055400 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 906>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio7: gpio@e6055800 {
@ -253,7 +273,7 @@ gpio7: gpio@e6055800 {
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
pmu_a57 {
@ -289,6 +309,12 @@ cpg: clock-controller@e6150000 {
#power-domain-cells = <0>;
};
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7795-sysc";
reg = <0 0xe6180000 0 0x0400>;
#power-domain-cells = <1>;
};
audma0: dma-controller@ec700000 {
compatible = "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
@ -316,7 +342,7 @@ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@ -348,7 +374,7 @@ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@ -370,7 +396,7 @@ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e6700000 {
@ -401,7 +427,7 @@ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@ -434,7 +460,7 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@ -467,7 +493,7 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 217>;
clock-names = "fck";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@ -509,12 +535,42 @@ avb: ethernet@e6800000 {
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 812>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
phy-mode = "rgmii-id";
#address-cells = <1>;
#size-cells = <0>;
};
can0: can@e6c30000 {
compatible = "renesas,can-r8a7795",
"renesas,rcar-gen3-can";
reg = <0 0xe6c30000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
can1: can@e6c38000 {
compatible = "renesas,can-r8a7795",
"renesas,rcar-gen3-can";
reg = <0 0xe6c38000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>,
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
@ -527,7 +583,7 @@ hscif0: serial@e6540000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -543,7 +599,7 @@ hscif1: serial@e6550000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -559,7 +615,7 @@ hscif2: serial@e6560000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -575,7 +631,7 @@ hscif3: serial@e66a0000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -591,7 +647,7 @@ hscif4: serial@e66b0000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x38>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -606,7 +662,7 @@ scif0: serial@e6e60000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -621,7 +677,7 @@ scif1: serial@e6e68000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -636,7 +692,7 @@ scif2: serial@e6e88000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x13>, <&dmac1 0x12>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -651,7 +707,7 @@ scif3: serial@e6c50000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -666,7 +722,7 @@ scif4: serial@e6c40000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -681,7 +737,7 @@ scif5: serial@e6f30000 {
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -692,7 +748,7 @@ i2c0: i2c@e6500000 {
reg = <0 0xe6500000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -704,7 +760,7 @@ i2c1: i2c@e6508000 {
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@ -716,7 +772,7 @@ i2c2: i2c@e6510000 {
reg = <0 0xe6510000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@ -728,7 +784,7 @@ i2c3: i2c@e66d0000 {
reg = <0 0xe66d0000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -740,7 +796,7 @@ i2c4: i2c@e66d8000 {
reg = <0 0xe66d8000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -752,7 +808,7 @@ i2c5: i2c@e66e0000 {
reg = <0 0xe66e0000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -764,7 +820,7 @@ i2c6: i2c@e66e8000 {
reg = <0 0xe66e8000 0 0x40>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 918>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@ -814,7 +870,7 @@ rcar_sound: sound@ec500000 {
"src.1", "src.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
rcar_sound,dvc {
@ -944,20 +1000,20 @@ sata: sata@ee300000 {
};
xhci0: usb@ee000000 {
compatible = "renesas,xhci-r8a7795";
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
xhci1: usb@ee0400000 {
compatible = "renesas,xhci-r8a7795";
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee040000 0 0xc00>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 327>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -969,7 +1025,7 @@ usb_dmac0: dma-controller@e65a0000 {
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <2>;
};
@ -982,7 +1038,7 @@ usb_dmac1: dma-controller@e65b0000 {
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <2>;
};
@ -992,7 +1048,7 @@ sdhi0: sd@ee100000 {
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1001,7 +1057,7 @@ sdhi1: sd@ee120000 {
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1010,7 +1066,7 @@ sdhi2: sd@ee140000 {
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
cap-mmc-highspeed;
status = "disabled";
};
@ -1020,7 +1076,7 @@ sdhi3: sd@ee160000 {
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
cap-mmc-highspeed;
status = "disabled";
};
@ -1030,7 +1086,7 @@ usb2_phy0: usb-phy@ee080200 {
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#phy-cells = <0>;
status = "disabled";
};
@ -1039,7 +1095,7 @@ usb2_phy1: usb-phy@ee0a0200 {
compatible = "renesas,usb2-phy-r8a7795";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#phy-cells = <0>;
status = "disabled";
};
@ -1048,7 +1104,7 @@ usb2_phy2: usb-phy@ee0c0200 {
compatible = "renesas,usb2-phy-r8a7795";
reg = <0 0xee0c0200 0 0x700>;
clocks = <&cpg CPG_MOD 701>;
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#phy-cells = <0>;
status = "disabled";
};
@ -1060,7 +1116,7 @@ ehci0: usb@ee080100 {
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1071,7 +1127,7 @@ ehci1: usb@ee0a0100 {
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1082,7 +1138,7 @@ ehci2: usb@ee0c0100 {
clocks = <&cpg CPG_MOD 701>;
phys = <&usb2_phy2>;
phy-names = "usb";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1093,7 +1149,7 @@ ohci0: usb@ee080000 {
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1104,7 +1160,7 @@ ohci1: usb@ee0a0000 {
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@ -1115,7 +1171,56 @@ ohci2: usb@ee0c0000 {
clocks = <&cpg CPG_MOD 701>;
phys = <&usb2_phy2>;
phy-names = "usb";
power-domains = <&cpg>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
pciec0: pcie@fe000000 {
compatible = "renesas,pcie-r8a7795";
reg = <0 0xfe000000 0 0x80000>;
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
device_type = "pci";
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
pciec1: pcie@ee800000 {
compatible = "renesas,pcie-r8a7795";
reg = <0 0xee800000 0 0x80000>;
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
device_type = "pci";
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
};