mirror of https://gitee.com/openkylin/linux.git
EDAC/altera: Initialize peripheral FIFOs in probe()
The FIFO memory and ECC initialization doesn't need to be done as a separate operation early in the startup. Improve the Arria10 and Stratix10 peripheral FIFO init by initializing memory and enabling ECC as part of the device driver initialization. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: James Morse <james.morse@arm.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: linux-edac <linux-edac@vger.kernel.org> Link: https://lkml.kernel.org/r/1553635771-32693-2-git-send-email-thor.thayer@linux.intel.com
This commit is contained in:
Thor Thayer
Borislav Petkov
parent
436b0a583a
commit
788586efd1
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@ -1361,8 +1361,19 @@ static const struct edac_device_prv_data a10_l2ecc_data = {
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#ifdef CONFIG_EDAC_ALTERA_ETHERNET
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static int __init socfpga_init_ethernet_ecc(struct altr_edac_device_dev *dev)
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{
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int ret;
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ret = altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc");
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if (ret)
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return ret;
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return altr_check_ecc_deps(dev);
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}
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static const struct edac_device_prv_data a10_enetecc_data = {
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.setup = altr_check_ecc_deps,
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.setup = socfpga_init_ethernet_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1374,21 +1385,25 @@ static const struct edac_device_prv_data a10_enetecc_data = {
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.inject_fops = &altr_edac_a10_device_inject2_fops,
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};
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static int __init socfpga_init_ethernet_ecc(void)
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{
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return altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc");
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}
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early_initcall(socfpga_init_ethernet_ecc);
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#endif /* CONFIG_EDAC_ALTERA_ETHERNET */
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/********************** NAND Device Functions **********************/
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#ifdef CONFIG_EDAC_ALTERA_NAND
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static int __init socfpga_init_nand_ecc(struct altr_edac_device_dev *device)
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{
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int ret;
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ret = altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc");
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if (ret)
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return ret;
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return altr_check_ecc_deps(device);
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}
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static const struct edac_device_prv_data a10_nandecc_data = {
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.setup = altr_check_ecc_deps,
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.setup = socfpga_init_nand_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1400,21 +1415,25 @@ static const struct edac_device_prv_data a10_nandecc_data = {
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.inject_fops = &altr_edac_a10_device_inject_fops,
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};
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static int __init socfpga_init_nand_ecc(void)
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{
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return altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc");
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}
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early_initcall(socfpga_init_nand_ecc);
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#endif /* CONFIG_EDAC_ALTERA_NAND */
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/********************** DMA Device Functions **********************/
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#ifdef CONFIG_EDAC_ALTERA_DMA
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static int __init socfpga_init_dma_ecc(struct altr_edac_device_dev *device)
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{
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int ret;
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ret = altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc");
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if (ret)
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return ret;
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return altr_check_ecc_deps(device);
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}
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static const struct edac_device_prv_data a10_dmaecc_data = {
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.setup = altr_check_ecc_deps,
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.setup = socfpga_init_dma_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1426,21 +1445,25 @@ static const struct edac_device_prv_data a10_dmaecc_data = {
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.inject_fops = &altr_edac_a10_device_inject_fops,
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};
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static int __init socfpga_init_dma_ecc(void)
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{
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return altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc");
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}
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early_initcall(socfpga_init_dma_ecc);
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#endif /* CONFIG_EDAC_ALTERA_DMA */
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/********************** USB Device Functions **********************/
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#ifdef CONFIG_EDAC_ALTERA_USB
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static int __init socfpga_init_usb_ecc(struct altr_edac_device_dev *device)
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{
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int ret;
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ret = altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc");
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if (ret)
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return ret;
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return altr_check_ecc_deps(device);
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}
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static const struct edac_device_prv_data a10_usbecc_data = {
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.setup = altr_check_ecc_deps,
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.setup = socfpga_init_usb_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1452,21 +1475,25 @@ static const struct edac_device_prv_data a10_usbecc_data = {
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.inject_fops = &altr_edac_a10_device_inject2_fops,
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};
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static int __init socfpga_init_usb_ecc(void)
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{
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return altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc");
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}
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early_initcall(socfpga_init_usb_ecc);
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#endif /* CONFIG_EDAC_ALTERA_USB */
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/********************** QSPI Device Functions **********************/
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#ifdef CONFIG_EDAC_ALTERA_QSPI
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static int __init socfpga_init_qspi_ecc(struct altr_edac_device_dev *device)
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{
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int ret;
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ret = altr_init_a10_ecc_device_type("altr,socfpga-qspi-ecc");
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if (ret)
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return ret;
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return altr_check_ecc_deps(device);
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}
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static const struct edac_device_prv_data a10_qspiecc_data = {
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.setup = altr_check_ecc_deps,
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.setup = socfpga_init_qspi_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1478,13 +1505,6 @@ static const struct edac_device_prv_data a10_qspiecc_data = {
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.inject_fops = &altr_edac_a10_device_inject_fops,
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};
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static int __init socfpga_init_qspi_ecc(void)
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{
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return altr_init_a10_ecc_device_type("altr,socfpga-qspi-ecc");
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}
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early_initcall(socfpga_init_qspi_ecc);
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#endif /* CONFIG_EDAC_ALTERA_QSPI */
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/********************* SDMMC Device Functions **********************/
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@ -1593,6 +1613,35 @@ static int altr_portb_setup(struct altr_edac_device_dev *device)
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return rc;
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}
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static int __init socfpga_init_sdmmc_ecc(struct altr_edac_device_dev *device)
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{
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int rc = -ENODEV;
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struct device_node *child;
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child = of_find_compatible_node(NULL, NULL, "altr,socfpga-sdmmc-ecc");
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if (!child)
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return -ENODEV;
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if (!of_device_is_available(child))
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goto exit;
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if (validate_parent_available(child))
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goto exit;
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/* Init portB */
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rc = altr_init_a10_ecc_block(child, ALTR_A10_SDMMC_IRQ_MASK,
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a10_sdmmceccb_data.ecc_enable_mask, 1);
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if (rc)
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goto exit;
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/* Setup portB */
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return altr_portb_setup(device);
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exit:
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of_node_put(child);
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return rc;
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}
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static irqreturn_t altr_edac_a10_ecc_irq_portb(int irq, void *dev_id)
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{
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struct altr_edac_device_dev *ad = dev_id;
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@ -1617,7 +1666,7 @@ static irqreturn_t altr_edac_a10_ecc_irq_portb(int irq, void *dev_id)
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}
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static const struct edac_device_prv_data a10_sdmmcecca_data = {
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.setup = altr_portb_setup,
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.setup = socfpga_init_sdmmc_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENA,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENA,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1630,7 +1679,7 @@ static const struct edac_device_prv_data a10_sdmmcecca_data = {
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};
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static const struct edac_device_prv_data a10_sdmmceccb_data = {
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.setup = altr_portb_setup,
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.setup = socfpga_init_sdmmc_ecc,
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.ce_clear_mask = ALTR_A10_ECC_SERRPENB,
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.ue_clear_mask = ALTR_A10_ECC_DERRPENB,
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.ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
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@ -1642,35 +1691,6 @@ static const struct edac_device_prv_data a10_sdmmceccb_data = {
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.inject_fops = &altr_edac_a10_device_inject_fops,
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};
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static int __init socfpga_init_sdmmc_ecc(void)
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{
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int rc = -ENODEV;
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struct device_node *child;
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if (!socfpga_is_a10() && !socfpga_is_s10())
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return -ENODEV;
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child = of_find_compatible_node(NULL, NULL, "altr,socfpga-sdmmc-ecc");
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if (!child) {
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edac_printk(KERN_WARNING, EDAC_DEVICE, "SDMMC node not found\n");
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return -ENODEV;
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}
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if (!of_device_is_available(child))
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goto exit;
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if (validate_parent_available(child))
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goto exit;
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rc = altr_init_a10_ecc_block(child, ALTR_A10_SDMMC_IRQ_MASK,
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a10_sdmmcecca_data.ecc_enable_mask, 1);
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exit:
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of_node_put(child);
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return rc;
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}
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early_initcall(socfpga_init_sdmmc_ecc);
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#endif /* CONFIG_EDAC_ALTERA_SDMMC */
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/********************* Arria10 EDAC Device Functions *************************/
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