mirror of https://gitee.com/openkylin/linux.git
Two patches that fix some operator precedence and zeroing of bits
-----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXb2lYgAKCRDj7w1vZxhR xX++AP931wTnnYugarLm6km0xXE/UZhYl+XBbRnUYqe+a3aN5AD9EoyuhZ3hpNzM juyr/D9G17u6WBHFWaZdXwOp0ylIYgA= =hj+3 -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-fixes-for-5.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes Two patches that fix some operator precedence and zeroing of bits * tag 'sunxi-clk-fixes-for-5.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18 clk: sunxi: Fix operator precedence in sunxi_divs_clk_setup
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78bdf57e99
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@ -1224,7 +1224,7 @@ static int sun9i_a80_ccu_probe(struct platform_device *pdev)
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/* Enforce d1 = 0, d2 = 0 for Audio PLL */
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val = readl(reg + SUN9I_A80_PLL_AUDIO_REG);
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val &= (BIT(16) & BIT(18));
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val &= ~(BIT(16) | BIT(18));
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writel(val, reg + SUN9I_A80_PLL_AUDIO_REG);
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/* Enforce P = 1 for both CPU cluster PLLs */
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@ -1080,8 +1080,8 @@ static struct clk ** __init sunxi_divs_clk_setup(struct device_node *node,
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rate_hw, rate_ops,
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gate_hw, &clk_gate_ops,
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clkflags |
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data->div[i].critical ?
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CLK_IS_CRITICAL : 0);
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(data->div[i].critical ?
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CLK_IS_CRITICAL : 0));
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WARN_ON(IS_ERR(clk_data->clks[i]));
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}
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