mirror of https://gitee.com/openkylin/linux.git
liquidio: tx rx interrupt moderation
This patch has new tx/rx interrupt moderation defaults of count/timer for better throughput and utilisation. Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com> Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com> Signed-off-by: Felix Manlunas <felix.manlunas@caviumnetworks.com> Signed-off-by: Raghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com> Signed-off-by: Raghu Vatsavayi <rvatsavayi@caviumnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
60b48c5a83
commit
78e6a9b4a4
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@ -616,50 +616,50 @@ static int lio_get_intr_coalesce(struct net_device *netdev,
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{
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struct lio *lio = GET_LIO(netdev);
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struct octeon_device *oct = lio->oct_dev;
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struct octeon_cn6xxx *cn6xxx = (struct octeon_cn6xxx *)oct->chip;
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struct octeon_instr_queue *iq;
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struct oct_intrmod_cfg *intrmod_cfg;
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intrmod_cfg = &oct->intrmod;
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switch (oct->chip_id) {
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/* case OCTEON_CN73XX: Todo */
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/* break; */
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case OCTEON_CN68XX:
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case OCTEON_CN66XX:
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if (!intrmod_cfg->intrmod_enable) {
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case OCTEON_CN66XX: {
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struct octeon_cn6xxx *cn6xxx =
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(struct octeon_cn6xxx *)oct->chip;
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if (!intrmod_cfg->rx_enable) {
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intr_coal->rx_coalesce_usecs =
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CFG_GET_OQ_INTR_TIME(cn6xxx->conf);
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intr_coal->rx_max_coalesced_frames =
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CFG_GET_OQ_INTR_PKT(cn6xxx->conf);
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} else {
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intr_coal->use_adaptive_rx_coalesce =
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intrmod_cfg->intrmod_enable;
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intr_coal->rate_sample_interval =
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intrmod_cfg->intrmod_check_intrvl;
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intr_coal->pkt_rate_high =
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intrmod_cfg->intrmod_maxpkt_ratethr;
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intr_coal->pkt_rate_low =
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intrmod_cfg->intrmod_minpkt_ratethr;
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intr_coal->rx_max_coalesced_frames_high =
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intrmod_cfg->intrmod_maxcnt_trigger;
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intr_coal->rx_coalesce_usecs_high =
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intrmod_cfg->intrmod_maxtmr_trigger;
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intr_coal->rx_coalesce_usecs_low =
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intrmod_cfg->intrmod_mintmr_trigger;
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intr_coal->rx_max_coalesced_frames_low =
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intrmod_cfg->intrmod_mincnt_trigger;
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}
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iq = oct->instr_queue[lio->linfo.txpciq[0].s.q_no];
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intr_coal->tx_max_coalesced_frames = iq->fill_threshold;
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break;
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}
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default:
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netif_info(lio, drv, lio->netdev, "Unknown Chip !!\n");
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return -EINVAL;
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}
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if (intrmod_cfg->rx_enable) {
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intr_coal->use_adaptive_rx_coalesce =
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intrmod_cfg->rx_enable;
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intr_coal->rate_sample_interval =
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intrmod_cfg->check_intrvl;
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intr_coal->pkt_rate_high =
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intrmod_cfg->maxpkt_ratethr;
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intr_coal->pkt_rate_low =
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intrmod_cfg->minpkt_ratethr;
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intr_coal->rx_max_coalesced_frames_high =
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intrmod_cfg->rx_maxcnt_trigger;
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intr_coal->rx_coalesce_usecs_high =
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intrmod_cfg->rx_maxtmr_trigger;
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intr_coal->rx_coalesce_usecs_low =
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intrmod_cfg->rx_mintmr_trigger;
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intr_coal->rx_max_coalesced_frames_low =
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intrmod_cfg->rx_mincnt_trigger;
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}
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return 0;
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}
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@ -679,19 +679,20 @@ static void octnet_intrmod_callback(struct octeon_device *oct_dev,
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else
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dev_info(&oct_dev->pci_dev->dev,
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"Rx-Adaptive Interrupt moderation enabled:%llx\n",
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oct_dev->intrmod.intrmod_enable);
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oct_dev->intrmod.rx_enable);
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octeon_free_soft_command(oct_dev, sc);
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}
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/* Configure interrupt moderation parameters */
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static int octnet_set_intrmod_cfg(void *oct, struct oct_intrmod_cfg *intr_cfg)
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static int octnet_set_intrmod_cfg(struct lio *lio,
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struct oct_intrmod_cfg *intr_cfg)
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{
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struct octeon_soft_command *sc;
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struct oct_intrmod_cmd *cmd;
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struct oct_intrmod_cfg *cfg;
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int retval;
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struct octeon_device *oct_dev = (struct octeon_device *)oct;
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struct octeon_device *oct_dev = lio->oct_dev;
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/* Alloc soft command */
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sc = (struct octeon_soft_command *)
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@ -712,6 +713,8 @@ static int octnet_set_intrmod_cfg(void *oct, struct oct_intrmod_cfg *intr_cfg)
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cmd->cfg = cfg;
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cmd->oct_dev = oct_dev;
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sc->iq_no = lio->linfo.txpciq[0].s.q_no;
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octeon_prepare_soft_command(oct_dev, sc, OPCODE_NIC,
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OPCODE_NIC_INTRMOD_CFG, 0, 0, 0);
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@ -730,7 +733,7 @@ static int octnet_set_intrmod_cfg(void *oct, struct oct_intrmod_cfg *intr_cfg)
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/* Enable/Disable auto interrupt Moderation */
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static int oct_cfg_adaptive_intr(struct lio *lio, struct ethtool_coalesce
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*intr_coal, int adaptive)
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*intr_coal)
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{
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int ret = 0;
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struct octeon_device *oct = lio->oct_dev;
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@ -738,59 +741,73 @@ static int oct_cfg_adaptive_intr(struct lio *lio, struct ethtool_coalesce
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intrmod_cfg = &oct->intrmod;
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if (adaptive) {
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if (oct->intrmod.rx_enable || oct->intrmod.tx_enable) {
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if (intr_coal->rate_sample_interval)
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intrmod_cfg->intrmod_check_intrvl =
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intrmod_cfg->check_intrvl =
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intr_coal->rate_sample_interval;
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else
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intrmod_cfg->intrmod_check_intrvl =
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intrmod_cfg->check_intrvl =
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LIO_INTRMOD_CHECK_INTERVAL;
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if (intr_coal->pkt_rate_high)
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intrmod_cfg->intrmod_maxpkt_ratethr =
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intrmod_cfg->maxpkt_ratethr =
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intr_coal->pkt_rate_high;
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else
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intrmod_cfg->intrmod_maxpkt_ratethr =
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intrmod_cfg->maxpkt_ratethr =
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LIO_INTRMOD_MAXPKT_RATETHR;
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if (intr_coal->pkt_rate_low)
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intrmod_cfg->intrmod_minpkt_ratethr =
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intrmod_cfg->minpkt_ratethr =
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intr_coal->pkt_rate_low;
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else
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intrmod_cfg->intrmod_minpkt_ratethr =
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intrmod_cfg->minpkt_ratethr =
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LIO_INTRMOD_MINPKT_RATETHR;
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}
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if (oct->intrmod.rx_enable) {
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if (intr_coal->rx_max_coalesced_frames_high)
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intrmod_cfg->intrmod_maxcnt_trigger =
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intrmod_cfg->rx_maxcnt_trigger =
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intr_coal->rx_max_coalesced_frames_high;
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else
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intrmod_cfg->intrmod_maxcnt_trigger =
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LIO_INTRMOD_MAXCNT_TRIGGER;
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intrmod_cfg->rx_maxcnt_trigger =
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LIO_INTRMOD_RXMAXCNT_TRIGGER;
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if (intr_coal->rx_coalesce_usecs_high)
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intrmod_cfg->intrmod_maxtmr_trigger =
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intrmod_cfg->rx_maxtmr_trigger =
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intr_coal->rx_coalesce_usecs_high;
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else
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intrmod_cfg->intrmod_maxtmr_trigger =
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LIO_INTRMOD_MAXTMR_TRIGGER;
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intrmod_cfg->rx_maxtmr_trigger =
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LIO_INTRMOD_RXMAXTMR_TRIGGER;
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if (intr_coal->rx_coalesce_usecs_low)
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intrmod_cfg->intrmod_mintmr_trigger =
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intrmod_cfg->rx_mintmr_trigger =
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intr_coal->rx_coalesce_usecs_low;
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else
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intrmod_cfg->intrmod_mintmr_trigger =
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LIO_INTRMOD_MINTMR_TRIGGER;
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intrmod_cfg->rx_mintmr_trigger =
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LIO_INTRMOD_RXMINTMR_TRIGGER;
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if (intr_coal->rx_max_coalesced_frames_low)
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intrmod_cfg->intrmod_mincnt_trigger =
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intrmod_cfg->rx_mincnt_trigger =
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intr_coal->rx_max_coalesced_frames_low;
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else
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intrmod_cfg->intrmod_mincnt_trigger =
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LIO_INTRMOD_MINCNT_TRIGGER;
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intrmod_cfg->rx_mincnt_trigger =
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LIO_INTRMOD_RXMINCNT_TRIGGER;
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}
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if (oct->intrmod.tx_enable) {
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if (intr_coal->tx_max_coalesced_frames_high)
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intrmod_cfg->tx_maxcnt_trigger =
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intr_coal->tx_max_coalesced_frames_high;
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else
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intrmod_cfg->tx_maxcnt_trigger =
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LIO_INTRMOD_TXMAXCNT_TRIGGER;
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if (intr_coal->tx_max_coalesced_frames_low)
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intrmod_cfg->tx_mincnt_trigger =
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intr_coal->tx_max_coalesced_frames_low;
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else
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intrmod_cfg->tx_mincnt_trigger =
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LIO_INTRMOD_TXMINCNT_TRIGGER;
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}
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intrmod_cfg->intrmod_enable = adaptive;
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ret = octnet_set_intrmod_cfg(oct, intrmod_cfg);
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ret = octnet_set_intrmod_cfg(lio, intrmod_cfg);
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return ret;
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}
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@ -798,54 +815,82 @@ static int oct_cfg_adaptive_intr(struct lio *lio, struct ethtool_coalesce
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static int
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oct_cfg_rx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal)
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{
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int ret;
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struct octeon_device *oct = lio->oct_dev;
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struct octeon_cn6xxx *cn6xxx = (struct octeon_cn6xxx *)oct->chip;
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u32 rx_max_coalesced_frames;
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/* Config Cnt based interrupt values */
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switch (oct->chip_id) {
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case OCTEON_CN68XX:
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case OCTEON_CN66XX: {
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struct octeon_cn6xxx *cn6xxx =
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(struct octeon_cn6xxx *)oct->chip;
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if (!intr_coal->rx_max_coalesced_frames)
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rx_max_coalesced_frames = CN6XXX_OQ_INTR_PKT;
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else
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rx_max_coalesced_frames = intr_coal->rx_max_coalesced_frames;
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/* Disable adaptive interrupt modulation */
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ret = oct_cfg_adaptive_intr(lio, intr_coal, 0);
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if (ret)
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return ret;
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/* Config Cnt based interrupt values */
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rx_max_coalesced_frames =
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intr_coal->rx_max_coalesced_frames;
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octeon_write_csr(oct, CN6XXX_SLI_OQ_INT_LEVEL_PKTS,
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rx_max_coalesced_frames);
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CFG_SET_OQ_INTR_PKT(cn6xxx->conf, rx_max_coalesced_frames);
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break;
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}
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int oct_cfg_rx_intrtime(struct lio *lio, struct ethtool_coalesce
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*intr_coal)
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{
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int ret;
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struct octeon_device *oct = lio->oct_dev;
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struct octeon_cn6xxx *cn6xxx = (struct octeon_cn6xxx *)oct->chip;
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u32 time_threshold, rx_coalesce_usecs;
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/* Config Time based interrupt values */
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switch (oct->chip_id) {
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case OCTEON_CN68XX:
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case OCTEON_CN66XX: {
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struct octeon_cn6xxx *cn6xxx =
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(struct octeon_cn6xxx *)oct->chip;
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if (!intr_coal->rx_coalesce_usecs)
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rx_coalesce_usecs = CN6XXX_OQ_INTR_TIME;
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else
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rx_coalesce_usecs = intr_coal->rx_coalesce_usecs;
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/* Disable adaptive interrupt modulation */
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ret = oct_cfg_adaptive_intr(lio, intr_coal, 0);
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if (ret)
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return ret;
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time_threshold = lio_cn6xxx_get_oq_ticks(oct,
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rx_coalesce_usecs);
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octeon_write_csr(oct,
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CN6XXX_SLI_OQ_INT_LEVEL_TIME,
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time_threshold);
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/* Config Time based interrupt values */
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time_threshold = lio_cn6xxx_get_oq_ticks(oct, rx_coalesce_usecs);
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octeon_write_csr(oct, CN6XXX_SLI_OQ_INT_LEVEL_TIME, time_threshold);
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CFG_SET_OQ_INTR_TIME(cn6xxx->conf, rx_coalesce_usecs);
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break;
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}
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int
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oct_cfg_tx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal
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__attribute__((unused)))
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{
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struct octeon_device *oct = lio->oct_dev;
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/* Config Cnt based interrupt values */
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switch (oct->chip_id) {
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case OCTEON_CN68XX:
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case OCTEON_CN66XX:
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int lio_set_intr_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *intr_coal)
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{
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@ -853,9 +898,15 @@ static int lio_set_intr_coalesce(struct net_device *netdev,
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int ret;
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struct octeon_device *oct = lio->oct_dev;
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u32 j, q_no;
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int db_max, db_min;
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if ((intr_coal->tx_max_coalesced_frames >= CN6XXX_DB_MIN) &&
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(intr_coal->tx_max_coalesced_frames <= CN6XXX_DB_MAX)) {
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switch (oct->chip_id) {
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case OCTEON_CN68XX:
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case OCTEON_CN66XX:
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db_min = CN6XXX_DB_MIN;
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db_max = CN6XXX_DB_MAX;
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if ((intr_coal->tx_max_coalesced_frames >= db_min) &&
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(intr_coal->tx_max_coalesced_frames <= db_max)) {
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for (j = 0; j < lio->linfo.num_txpciq; j++) {
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q_no = lio->linfo.txpciq[j].s.q_no;
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oct->instr_queue[q_no]->fill_threshold =
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@ -864,43 +915,21 @@ static int lio_set_intr_coalesce(struct net_device *netdev,
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} else {
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dev_err(&oct->pci_dev->dev,
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"LIQUIDIO: Invalid tx-frames:%d. Range is min:%d max:%d\n",
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intr_coal->tx_max_coalesced_frames, CN6XXX_DB_MIN,
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CN6XXX_DB_MAX);
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intr_coal->tx_max_coalesced_frames, db_min,
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db_max);
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return -EINVAL;
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}
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break;
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default:
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return -EINVAL;
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}
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/* User requested adaptive-rx on */
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if (intr_coal->use_adaptive_rx_coalesce) {
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ret = oct_cfg_adaptive_intr(lio, intr_coal, 1);
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if (ret)
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goto ret_intrmod;
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}
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oct->intrmod.rx_enable = intr_coal->use_adaptive_rx_coalesce ? 1 : 0;
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oct->intrmod.tx_enable = intr_coal->use_adaptive_tx_coalesce ? 1 : 0;
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/* User requested adaptive-rx off and rx coalesce */
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if ((intr_coal->rx_coalesce_usecs) &&
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(!intr_coal->use_adaptive_rx_coalesce)) {
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ret = oct_cfg_rx_intrtime(lio, intr_coal);
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if (ret)
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goto ret_intrmod;
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}
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ret = oct_cfg_adaptive_intr(lio, intr_coal);
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/* User requested adaptive-rx off and rx coalesce */
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if ((intr_coal->rx_max_coalesced_frames) &&
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(!intr_coal->use_adaptive_rx_coalesce)) {
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ret = oct_cfg_rx_intrcnt(lio, intr_coal);
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if (ret)
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goto ret_intrmod;
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}
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/* User requested adaptive-rx off, so use default coalesce params */
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if ((!intr_coal->rx_max_coalesced_frames) &&
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(!intr_coal->use_adaptive_rx_coalesce) &&
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(!intr_coal->rx_coalesce_usecs)) {
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dev_info(&oct->pci_dev->dev,
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"Turning off adaptive-rx interrupt moderation\n");
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dev_info(&oct->pci_dev->dev,
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"Using RX Coalesce Default values rx_coalesce_usecs:%d rx_max_coalesced_frames:%d\n",
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CN6XXX_OQ_INTR_TIME, CN6XXX_OQ_INTR_PKT);
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if (!intr_coal->use_adaptive_rx_coalesce) {
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ret = oct_cfg_rx_intrtime(lio, intr_coal);
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if (ret)
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goto ret_intrmod;
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@ -909,6 +938,11 @@ static int lio_set_intr_coalesce(struct net_device *netdev,
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if (ret)
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goto ret_intrmod;
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}
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if (!intr_coal->use_adaptive_tx_coalesce) {
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ret = oct_cfg_tx_intrcnt(lio, intr_coal);
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if (ret)
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goto ret_intrmod;
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}
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return 0;
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ret_intrmod:
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@ -3579,15 +3579,19 @@ static int liquidio_init_nic_module(struct octeon_device *oct)
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||||
/* Initialize interrupt moderation params */
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||||
intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
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||||
intrmod_cfg->intrmod_enable = 1;
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||||
intrmod_cfg->intrmod_check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
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||||
intrmod_cfg->intrmod_maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
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||||
intrmod_cfg->intrmod_minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
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||||
intrmod_cfg->intrmod_maxcnt_trigger = LIO_INTRMOD_MAXCNT_TRIGGER;
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||||
intrmod_cfg->intrmod_maxtmr_trigger = LIO_INTRMOD_MAXTMR_TRIGGER;
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||||
intrmod_cfg->intrmod_mintmr_trigger = LIO_INTRMOD_MINTMR_TRIGGER;
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||||
intrmod_cfg->intrmod_mincnt_trigger = LIO_INTRMOD_MINCNT_TRIGGER;
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||||
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||||
intrmod_cfg->rx_enable = 1;
|
||||
intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
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||||
intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
|
||||
intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
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||||
intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
|
||||
intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
|
||||
intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
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||||
intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
|
||||
intrmod_cfg->tx_enable = 1;
|
||||
intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
|
||||
intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
|
||||
intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
|
||||
intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
|
||||
dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
|
||||
|
||||
return retval;
|
||||
|
|
|
@ -796,23 +796,44 @@ struct oct_mdio_cmd {
|
|||
|
||||
#define OCT_LINK_STATS_SIZE (sizeof(struct oct_link_stats))
|
||||
|
||||
/* intrmod: max. packet rate threshold */
|
||||
#define LIO_INTRMOD_MAXPKT_RATETHR 196608
|
||||
/* intrmod: min. packet rate threshold */
|
||||
#define LIO_INTRMOD_MINPKT_RATETHR 9216
|
||||
/* intrmod: max. packets to trigger interrupt */
|
||||
#define LIO_INTRMOD_RXMAXCNT_TRIGGER 384
|
||||
/* intrmod: min. packets to trigger interrupt */
|
||||
#define LIO_INTRMOD_RXMINCNT_TRIGGER 1
|
||||
/* intrmod: max. time to trigger interrupt */
|
||||
#define LIO_INTRMOD_RXMAXTMR_TRIGGER 128
|
||||
/* 66xx:intrmod: min. time to trigger interrupt
|
||||
* (value of 1 is optimum for TCP_RR)
|
||||
*/
|
||||
#define LIO_INTRMOD_RXMINTMR_TRIGGER 1
|
||||
|
||||
/* intrmod: max. packets to trigger interrupt */
|
||||
#define LIO_INTRMOD_TXMAXCNT_TRIGGER 64
|
||||
/* intrmod: min. packets to trigger interrupt */
|
||||
#define LIO_INTRMOD_TXMINCNT_TRIGGER 0
|
||||
|
||||
/* intrmod: poll interval in seconds */
|
||||
#define LIO_INTRMOD_CHECK_INTERVAL 1
|
||||
#define LIO_INTRMOD_MAXPKT_RATETHR 196608 /* max pkt rate threshold */
|
||||
#define LIO_INTRMOD_MINPKT_RATETHR 9216 /* min pkt rate threshold */
|
||||
#define LIO_INTRMOD_MAXCNT_TRIGGER 384 /* max pkts to trigger interrupt */
|
||||
#define LIO_INTRMOD_MINCNT_TRIGGER 1 /* min pkts to trigger interrupt */
|
||||
#define LIO_INTRMOD_MAXTMR_TRIGGER 128 /* max time to trigger interrupt */
|
||||
#define LIO_INTRMOD_MINTMR_TRIGGER 32 /* min time to trigger interrupt */
|
||||
|
||||
struct oct_intrmod_cfg {
|
||||
u64 intrmod_enable;
|
||||
u64 intrmod_check_intrvl;
|
||||
u64 intrmod_maxpkt_ratethr;
|
||||
u64 intrmod_minpkt_ratethr;
|
||||
u64 intrmod_maxcnt_trigger;
|
||||
u64 intrmod_maxtmr_trigger;
|
||||
u64 intrmod_mincnt_trigger;
|
||||
u64 intrmod_mintmr_trigger;
|
||||
u64 rx_enable;
|
||||
u64 tx_enable;
|
||||
u64 check_intrvl;
|
||||
u64 maxpkt_ratethr;
|
||||
u64 minpkt_ratethr;
|
||||
u64 rx_maxcnt_trigger;
|
||||
u64 rx_mincnt_trigger;
|
||||
u64 rx_maxtmr_trigger;
|
||||
u64 rx_mintmr_trigger;
|
||||
u64 tx_mincnt_trigger;
|
||||
u64 tx_maxcnt_trigger;
|
||||
u64 rx_frames;
|
||||
u64 tx_frames;
|
||||
u64 rx_usecs;
|
||||
};
|
||||
|
||||
#define BASE_QUEUE_NOT_REQUESTED 65535
|
||||
|
|
Loading…
Reference in New Issue