mirror of https://gitee.com/openkylin/linux.git
Qualcomm Device Tree Changes for v5.3
* Add display support to MSM8974 * Add display, backlight, and touchscreen support to MSM8974 Hammerhead * Update coresight bindings for MSM8974 and APQ8064 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJdCeMbAAoJEFKiBbHx2RXV8ikQAKrkShMW6iBQ1v/dnyHsNvI5 rG0w2BKk6YVUjcP0DMgKMtVwvLCmk8sW1Hj9ZOO+eE/M0pNTmWzyeVlAqPW580WT Bu9RWzRrQud2shx9uXMsQypcIA/t5zJ6TtbkG6VXFodYVUAMWQCnjWIH3TEPMwOp HcZdz4bUVL7+mD20dXy4RTz6ZRaNEYf+IQUrc2WJehzv5IbIjS9UD1zzNeswEb/t rBNa5quvSYC9sc5eKC6tt4qrnbU3urFZp5ugOCl9hgEkEpHrFeDf2QNUjKqHqdx/ xCPzFZpu61syRTivpykwvbwOkjqoYoT8+/RhcyPDYQiuMhcTr8XcTgRC1XVsm0Xd OVU+XXOdaA9GqVWKc20rPbXWpMejM7LZQLpWwPr6Y/z2nTEUlNH+vCMcS4z4zvZS 7jIA/kRR1v0N0LO1644etthVGxmzTX0u+iLyjhAO7TItwdKsaCXygRjlR1GIjie7 fwUSXvZTwBpw38+mQj0QEe8N7HQBaRhRIMB8CYs/s+ktdT3flgw2VD1tqU5jXETA syzKVcUjjoKkHo1ezErR+Zy8q/K43EqUbxbed0VWN0vvUAXxtnFzJPwhlRg5bpk5 bGwVvBxeA6cn+3HDtVWecBlztTfyV2w2hNQsJ7NU2X3j5KWE/ynX8IJ+Ibns4uE7 mON/7w9XG7d17CjY/vNE =q1ev -----END PGP SIGNATURE----- Merge tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm Device Tree Changes for v5.3 * Add display support to MSM8974 * Add display, backlight, and touchscreen support to MSM8974 Hammerhead * Update coresight bindings for MSM8974 and APQ8064 * tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: msm8974-hammerhead: add support for display ARM: dts: msm8974: add display support ARM: dts: qcom: msm8974-hammerhead: add support for backlight ARM: dts: qcom: msm8974-hammerhead: add touchscreen support ARM: dts: qcom-msm8974: Update coresight DT bindings ARM: dts: qcom-apq8064: Update coresight DT bindings Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
791c6fdb0b
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@ -1603,7 +1603,7 @@ tpiu_in: endpoint {
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};
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replicator {
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compatible = "arm,coresight-replicator";
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compatible = "arm,coresight-static-replicator";
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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@ -1636,7 +1636,7 @@ replicator_in: endpoint {
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};
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funnel@1a04000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
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reg = <0x1a04000 0x1000>;
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clocks = <&rpmcc RPM_QDSS_CLK>;
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@ -280,6 +280,16 @@ mux {
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};
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};
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i2c2_pins: i2c2 {
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mux {
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pins = "gpio6", "gpio7";
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function = "blsp_i2c2";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c3_pins: i2c3 {
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mux {
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pins = "gpio10", "gpio11";
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@ -289,6 +299,16 @@ mux {
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};
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};
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i2c11_pins: i2c11 {
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mux {
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pins = "gpio83", "gpio84";
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function = "blsp_i2c11";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c12_pins: i2c12 {
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mux {
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pins = "gpio87", "gpio88";
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@ -306,6 +326,35 @@ irq {
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input-enable;
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};
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};
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touch_pin: touch {
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int {
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pins = "gpio5";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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input-enable;
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};
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reset {
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pins = "gpio8";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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panel_pin: panel {
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te {
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pins = "gpio12";
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function = "mdp_vsync";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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sdhci@f9824900 {
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@ -369,6 +418,30 @@ volume-down {
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};
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};
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i2c@f9967000 {
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status = "ok";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c11_pins>;
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clock-frequency = <355000>;
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qcom,src-freq = <50000000>;
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led-controller@38 {
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compatible = "ti,lm3630a";
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status = "ok";
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reg = <0x38>;
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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led-sources = <0 1>;
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label = "lcd-backlight";
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default-brightness = <200>;
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};
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};
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};
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i2c@f9968000 {
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status = "ok";
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pinctrl-names = "default";
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@ -424,6 +497,41 @@ charger: bq24192@6b {
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};
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};
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i2c@f9924000 {
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status = "ok";
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clock-frequency = <355000>;
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qcom,src-freq = <50000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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synaptics@70 {
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compatible = "syna,rmi4-i2c";
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reg = <0x70>;
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interrupts-extended = <&msmgpio 5 IRQ_TYPE_EDGE_FALLING>;
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vdd-supply = <&pm8941_l22>;
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vio-supply = <&pm8941_lvs3>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_pin>;
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#address-cells = <1>;
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#size-cells = <0>;
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rmi4-f01@1 {
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reg = <0x1>;
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syna,nosleep-mode = <1>;
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};
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rmi4-f12@12 {
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reg = <0x12>;
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syna,sensor-type = <1>;
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};
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};
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};
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i2c@f9925000 {
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status = "ok";
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pinctrl-names = "default";
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@ -466,6 +574,54 @@ phy@a {
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};
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};
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};
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mdss@fd900000 {
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status = "ok";
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mdp@fd900000 {
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status = "ok";
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};
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dsi@fd922800 {
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status = "ok";
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vdda-supply = <&pm8941_l2>;
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vdd-supply = <&pm8941_lvs3>;
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vddio-supply = <&pm8941_l12>;
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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port@1 {
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endpoint {
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remote-endpoint = <&panel_in>;
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data-lanes = <0 1 2 3>;
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};
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};
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};
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panel: panel@0 {
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reg = <0>;
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compatible = "lg,acx467akm-7";
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pinctrl-names = "default";
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pinctrl-0 = <&panel_pin>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&dsi0_out>;
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};
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};
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};
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};
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dsi-phy@fd922a00 {
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status = "ok";
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vddio-supply = <&pm8941_l12>;
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};
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};
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};
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&spmi_bus {
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@ -3,6 +3,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-msm8974.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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#include <dt-bindings/reset/qcom,gcc-msm8974.h>
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#include <dt-bindings/gpio/gpio.h>
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@ -897,7 +898,7 @@ etf_in: endpoint {
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};
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funnel@fc31b000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
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reg = <0xfc31b000 0x1000>;
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
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@ -931,7 +932,7 @@ merger_out: endpoint {
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};
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funnel@fc31a000 {
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compatible = "arm,coresight-funnel", "arm,primecell";
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
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reg = <0xfc31a000 0x1000>;
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
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@ -969,7 +970,7 @@ funnel1_out: endpoint {
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};
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funnel@fc345000 { /* KPSS funnel only 4 inputs are used */
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compatible = "arm,coresight-funnel", "arm,primecell";
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
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reg = <0xfc345000 0x1000>;
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clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
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@ -1085,6 +1086,137 @@ etm3_out: endpoint {
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};
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};
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};
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mdss: mdss@fd900000 {
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status = "disabled";
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compatible = "qcom,mdss";
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reg = <0xfd900000 0x100>,
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<0xfd924000 0x1000>;
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reg-names = "mdss_phys",
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"vbif_phys";
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power-domains = <&mmcc MDSS_GDSC>;
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clocks = <&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>,
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<&mmcc MDSS_VSYNC_CLK>;
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clock-names = "iface",
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"bus",
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"vsync";
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mdp: mdp@fd900000 {
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status = "disabled";
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compatible = "qcom,mdp5";
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reg = <0xfd900100 0x22000>;
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reg-names = "mdp_phys";
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interrupt-parent = <&mdss>;
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interrupts = <0 0>;
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clocks = <&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>,
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<&mmcc MDSS_MDP_CLK>,
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<&mmcc MDSS_VSYNC_CLK>;
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clock-names = "iface",
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"bus",
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"core",
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"vsync";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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mdp5_intf1_out: endpoint {
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remote-endpoint = <&dsi0_in>;
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};
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};
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};
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};
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dsi0: dsi@fd922800 {
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status = "disabled";
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compatible = "qcom,mdss-dsi-ctrl";
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reg = <0xfd922800 0x1f8>;
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reg-names = "dsi_ctrl";
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interrupt-parent = <&mdss>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
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assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
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<&mmcc PCLK0_CLK_SRC>;
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assigned-clock-parents = <&dsi_phy0 0>,
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<&dsi_phy0 1>;
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clocks = <&mmcc MDSS_MDP_CLK>,
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<&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>,
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<&mmcc MDSS_BYTE0_CLK>,
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<&mmcc MDSS_PCLK0_CLK>,
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<&mmcc MDSS_ESC0_CLK>,
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<&mmcc MMSS_MISC_AHB_CLK>;
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clock-names = "mdp_core",
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"iface",
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"bus",
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"byte",
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"pixel",
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"core",
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"core_mmss";
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phys = <&dsi_phy0>;
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phy-names = "dsi-phy";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi0_in: endpoint {
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remote-endpoint = <&mdp5_intf1_out>;
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};
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};
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port@1 {
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reg = <1>;
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dsi0_out: endpoint {
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};
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};
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};
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};
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dsi_phy0: dsi-phy@fd922a00 {
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status = "disabled";
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compatible = "qcom,dsi-phy-28nm-hpm";
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reg = <0xfd922a00 0xd4>,
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<0xfd922b00 0x280>,
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<0xfd922d80 0x30>;
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reg-names = "dsi_pll",
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"dsi_phy",
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"dsi_phy_regulator";
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#clock-cells = <1>;
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#phy-cells = <0>;
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qcom,dsi-phy-index = <0>;
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clocks = <&mmcc MDSS_AHB_CLK>;
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clock-names = "iface";
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};
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};
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};
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smd {
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