mirror of https://gitee.com/openkylin/linux.git
vfio/pci: Fix handling of RC integrated endpoint PCIe capability size
Root complex integrated endpoints do not have a link and therefore may use a smaller PCIe capability in config space than we expect when building our config map. Add a case for these to avoid reporting an erroneous overlap. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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@ -839,7 +839,7 @@ static int vfio_exp_config_write(struct vfio_pci_device *vdev, int pos,
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/* Permissions for PCI Express capability */
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static int __init init_pci_cap_exp_perm(struct perm_bits *perm)
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{
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/* Alloc larger of two possible sizes */
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/* Alloc largest of possible sizes */
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if (alloc_perm_bits(perm, PCI_CAP_EXP_ENDPOINT_SIZEOF_V2))
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return -ENOMEM;
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@ -1243,11 +1243,16 @@ static int vfio_cap_len(struct vfio_pci_device *vdev, u8 cap, u8 pos)
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vdev->extended_caps = (dword != 0);
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}
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/* length based on version */
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if ((pcie_caps_reg(pdev) & PCI_EXP_FLAGS_VERS) == 1)
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/* length based on version and type */
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if ((pcie_caps_reg(pdev) & PCI_EXP_FLAGS_VERS) == 1) {
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END)
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return 0xc; /* "All Devices" only, no link */
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return PCI_CAP_EXP_ENDPOINT_SIZEOF_V1;
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else
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} else {
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END)
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return 0x2c; /* No link */
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return PCI_CAP_EXP_ENDPOINT_SIZEOF_V2;
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}
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case PCI_CAP_ID_HT:
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ret = pci_read_config_byte(pdev, pos + 3, &byte);
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if (ret)
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