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staging: comedi: s626: replace S626_MULT_X? values
Replace the use of the `S626_MULT_X1`, `S626_MULT_X2` and `S626_MULT_X4` clock multiplier values with the equivalent `S626_CLKMULT_1X`, `S626_CLKMULT_2X` and `S626_CLKMULT_4X` values to avoid duplication. Replace the use of `S626_MULT_X0` with a new macro `S626_CLKMULT_SPECIAL` (this is treated specially by the 'ClkMultA'/'ClkMultB' field of the 'CRA'/'CRB' register). Remove the now unused `S626_MULT_X?` macros. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ian Abbott
Greg Kroah-Hartman
parent
43ce748ff2
commit
7a1046e5c0
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@ -731,7 +731,7 @@ static uint16_t s626_get_mode_a(struct comedi_device *dev,
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/* Set ClkPol to indicate count direction (CntSrcA<0>). */
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clkpol = cntsrc & 1;
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/* ClkMult must be 1x in Timer mode. */
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clkmult = S626_MULT_X1;
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clkmult = S626_CLKMULT_1X;
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} else {
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/* Counter mode (CntSrcA<1> == 0): */
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encmode = S626_ENCMODE_COUNTER;
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@ -739,8 +739,8 @@ static uint16_t s626_get_mode_a(struct comedi_device *dev,
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clkpol = S626_GET_CRA_CLKPOL_A(cra);
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/* Force ClkMult to 1x if not legal, else pass through. */
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clkmult = S626_GET_CRA_CLKMULT_A(cra);
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if (clkmult == S626_MULT_X0)
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clkmult = S626_MULT_X1;
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if (clkmult == S626_CLKMULT_SPECIAL)
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clkmult = S626_CLKMULT_1X;
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}
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setup |= S626_SET_STD_ENCMODE(encmode) | S626_SET_STD_CLKMULT(clkmult) |
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S626_SET_STD_CLKPOL(clkpol);
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@ -781,18 +781,18 @@ static uint16_t s626_get_mode_b(struct comedi_device *dev,
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/* Adjust mode-dependent parameters. */
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cntsrc = S626_GET_CRA_CNTSRC_B(cra);
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clkmult = S626_GET_CRB_CLKMULT_B(crb);
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if (clkmult == S626_MULT_X0) {
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/* Extender mode (ClkMultB == S626_MULT_X0): */
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if (clkmult == S626_CLKMULT_SPECIAL) {
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/* Extender mode (ClkMultB == S626_CLKMULT_SPECIAL): */
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encmode = S626_ENCMODE_EXTENDER;
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/* Indicate multiplier is 1x. */
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clkmult = S626_MULT_X1;
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clkmult = S626_CLKMULT_1X;
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/* Set ClkPol equal to Timer count direction (CntSrcB<0>). */
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clkpol = cntsrc & 1;
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} else if (cntsrc & S626_CNTSRC_SYSCLK) {
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/* Timer mode (CntSrcB<1> == 1): */
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encmode = S626_ENCMODE_TIMER;
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/* Indicate multiplier is 1x. */
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clkmult = S626_MULT_X1;
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clkmult = S626_CLKMULT_1X;
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/* Set ClkPol equal to Timer count direction (CntSrcB<0>). */
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clkpol = cntsrc & 1;
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} else {
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@ -853,7 +853,7 @@ static void s626_set_mode_a(struct comedi_device *dev,
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/* ClkPolA behaves as always-on clock enable. */
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clkpol = 1;
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/* ClkMult must be 1x. */
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clkmult = S626_MULT_X1;
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clkmult = S626_CLKMULT_1X;
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break;
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default: /* Counter Mode: */
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/* Select ENC_C and ENC_D as clock/direction inputs. */
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@ -861,8 +861,8 @@ static void s626_set_mode_a(struct comedi_device *dev,
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/* Clock polarity is passed through. */
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/* Force multiplier to x1 if not legal, else pass through. */
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clkmult = S626_GET_STD_CLKMULT(setup);
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if (clkmult == S626_MULT_X0)
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clkmult = S626_MULT_X1;
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if (clkmult == S626_CLKMULT_SPECIAL)
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clkmult = S626_CLKMULT_1X;
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break;
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}
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cra |= S626_SET_CRA_CNTSRC_A(cntsrc) | S626_SET_CRA_CLKPOL_A(clkpol) |
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@ -927,7 +927,7 @@ static void s626_set_mode_b(struct comedi_device *dev,
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/* ClkPolB behaves as always-on clock enable. */
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clkpol = 1;
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/* ClkMultB must be 1x. */
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clkmult = S626_MULT_X1;
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clkmult = S626_CLKMULT_1X;
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break;
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case S626_ENCMODE_EXTENDER: /* Extender Mode: */
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/* CntSrcB source is OverflowA (same as "timer") */
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@ -937,7 +937,7 @@ static void s626_set_mode_b(struct comedi_device *dev,
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/* ClkPolB controls IndexB -- always set to active. */
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clkpol = 1;
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/* ClkMultB selects OverflowA as the clock source. */
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clkmult = S626_MULT_X0;
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clkmult = S626_CLKMULT_SPECIAL;
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break;
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default: /* Counter Mode: */
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/* Select ENC_C and ENC_D as clock/direction inputs. */
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@ -945,8 +945,8 @@ static void s626_set_mode_b(struct comedi_device *dev,
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/* ClkPol is passed through. */
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/* Force ClkMult to x1 if not legal, otherwise pass through. */
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clkmult = S626_GET_STD_CLKMULT(setup);
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if (clkmult == S626_MULT_X0)
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clkmult = S626_MULT_X1;
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if (clkmult == S626_CLKMULT_SPECIAL)
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clkmult = S626_CLKMULT_1X;
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break;
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}
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cra |= S626_SET_CRA_CNTSRC_B(cntsrc);
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@ -498,17 +498,7 @@
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#define S626_CLKMULT_4X 0 /* 4x clock multiplier. */
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#define S626_CLKMULT_2X 1 /* 2x clock multiplier. */
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#define S626_CLKMULT_1X 2 /* 1x clock multiplier. */
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/* Enumerated counter clock multipliers. */
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#define S626_MULT_X0 0x0003 /* Supports no multipliers;
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* fixed physical multiplier = 3. */
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#define S626_MULT_X1 0x0002 /* Supports multiplier x1;
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* fixed physical multiplier = 2. */
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#define S626_MULT_X2 0x0001 /* Supports multipliers x1, x2;
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* physical multipliers = 1 or 2. */
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#define S626_MULT_X4 0x0000 /* Supports multipliers x1, x2, x4;
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* physical multipliers = 0, 1 or 2. */
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#define S626_CLKMULT_SPECIAL 3 /* Special clock multiplier value. */
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/* Sanity-check limits for parameters. */
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