mirror of https://gitee.com/openkylin/linux.git
ARM: DRA7: hwmod: Add data for RNG IP
DRA7 SoC contains hardware random number generator. Add hwmod data for this IP so that it can be utilized. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [t-kristo@ti.com: squashed the RNG hwmod IP flag fixes from Lokesh, squashed the HS chip fix from Daniel Allred] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -2641,6 +2641,34 @@ static struct omap_hwmod dra7xx_des_hwmod = {
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},
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};
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/* rng */
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static struct omap_hwmod_class_sysconfig dra7xx_rng_sysc = {
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.rev_offs = 0x1fe0,
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.sysc_offs = 0x1fe4,
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.sysc_flags = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE,
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.idlemodes = SIDLE_FORCE | SIDLE_NO,
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class dra7xx_rng_hwmod_class = {
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.name = "rng",
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.sysc = &dra7xx_rng_sysc,
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};
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static struct omap_hwmod dra7xx_rng_hwmod = {
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.name = "rng",
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.class = &dra7xx_rng_hwmod_class,
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.flags = HWMOD_SWSUP_SIDLE,
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.clkdm_name = "l4sec_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4SEC_RNG_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4SEC_RNG_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_HWCTRL,
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},
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},
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};
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/*
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* 'usb_otg_ss' class
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*
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@ -3798,6 +3826,13 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__uart10 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per1 -> rng */
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static struct omap_hwmod_ocp_if dra7xx_l4_per1__rng = {
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.master = &dra7xx_l4_per1_hwmod,
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.slave = &dra7xx_rng_hwmod,
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.user = OCP_USER_MPU,
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};
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/* l4_per3 -> usb_otg_ss1 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = {
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.master = &dra7xx_l4_per3_hwmod,
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@ -4028,6 +4063,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
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/* GP-only hwmod links */
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static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = {
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&dra7xx_l4_wkup__timer12,
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&dra7xx_l4_per1__rng,
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NULL,
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};
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