mirror of https://gitee.com/openkylin/linux.git
regulator: mt6315: Add support for MT6315 regulator
The MT6315 is a regulator found on boards based on MediaTek MT8192 and probably other SoCs. It connects as a slave to SoC using SPMI. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Link: https://lore.kernel.org/r/1612678457-11548-3-git-send-email-hsin-hsiung.wang@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Hsin-Hsiung Wang
Mark Brown
parent
977fb5b584
commit
7aa382cfe7
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@ -731,6 +731,16 @@ config REGULATOR_MT6311
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This driver supports the control of different power rails of device
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through regulator interface.
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config REGULATOR_MT6315
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tristate "MediaTek MT6315 PMIC"
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depends on SPMI
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select REGMAP_SPMI
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help
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Say y here to select this option to enable the power regulator of
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MediaTek MT6315 PMIC.
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This driver supports the control of different power rails of device
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through regulator interface.
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config REGULATOR_MT6323
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tristate "MediaTek MT6323 PMIC"
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depends on MFD_MT6397
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@ -89,6 +89,7 @@ obj-$(CONFIG_REGULATOR_MP8859) += mp8859.o
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obj-$(CONFIG_REGULATOR_MP886X) += mp886x.o
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obj-$(CONFIG_REGULATOR_MPQ7920) += mpq7920.o
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obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o
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obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o
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obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o
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obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o
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obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o
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@ -0,0 +1,299 @@
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// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2021 MediaTek Inc.
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/mt6315-regulator.h>
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#include <linux/regulator/of_regulator.h>
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#include <linux/spmi.h>
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#define MT6315_BUCK_MODE_AUTO 0
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#define MT6315_BUCK_MODE_FORCE_PWM 1
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#define MT6315_BUCK_MODE_LP 2
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struct mt6315_regulator_info {
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struct regulator_desc desc;
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u32 status_reg;
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u32 lp_mode_mask;
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u32 lp_mode_shift;
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};
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struct mt_regulator_init_data {
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u32 modeset_mask[MT6315_VBUCK_MAX];
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};
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struct mt6315_chip {
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struct device *dev;
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struct regmap *regmap;
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};
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#define MT_BUCK(_name, _bid, _vsel) \
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[_bid] = { \
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.desc = { \
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.name = _name, \
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.of_match = of_match_ptr(_name), \
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.regulators_node = "regulators", \
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.ops = &mt6315_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = _bid, \
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.owner = THIS_MODULE, \
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.n_voltages = 0xbf, \
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.linear_ranges = mt_volt_range1, \
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.n_linear_ranges = ARRAY_SIZE(mt_volt_range1), \
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.vsel_reg = _vsel, \
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.vsel_mask = 0xff, \
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.enable_reg = MT6315_BUCK_TOP_CON0, \
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.enable_mask = BIT(_bid), \
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.of_map_mode = mt6315_map_mode, \
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}, \
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.status_reg = _bid##_DBG4, \
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.lp_mode_mask = BIT(_bid), \
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.lp_mode_shift = _bid, \
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}
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static const struct linear_range mt_volt_range1[] = {
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REGULATOR_LINEAR_RANGE(0, 0, 0xbf, 6250),
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};
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static unsigned int mt6315_map_mode(u32 mode)
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{
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switch (mode) {
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case MT6315_BUCK_MODE_AUTO:
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return REGULATOR_MODE_NORMAL;
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case MT6315_BUCK_MODE_FORCE_PWM:
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return REGULATOR_MODE_FAST;
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case MT6315_BUCK_MODE_LP:
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return REGULATOR_MODE_IDLE;
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default:
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return -EINVAL;
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}
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}
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static unsigned int mt6315_regulator_get_mode(struct regulator_dev *rdev)
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{
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struct mt_regulator_init_data *init = rdev_get_drvdata(rdev);
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const struct mt6315_regulator_info *info;
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int ret, regval;
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u32 modeset_mask;
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info = container_of(rdev->desc, struct mt6315_regulator_info, desc);
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modeset_mask = init->modeset_mask[rdev_get_id(rdev)];
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ret = regmap_read(rdev->regmap, MT6315_BUCK_TOP_4PHASE_ANA_CON42, ®val);
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if (ret != 0) {
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dev_notice(&rdev->dev, "Failed to get mode: %d\n", ret);
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return ret;
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}
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if ((regval & modeset_mask) == modeset_mask)
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return REGULATOR_MODE_FAST;
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ret = regmap_read(rdev->regmap, MT6315_BUCK_TOP_CON1, ®val);
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if (ret != 0) {
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dev_notice(&rdev->dev, "Failed to get lp mode: %d\n", ret);
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return ret;
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}
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if (regval & info->lp_mode_mask)
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return REGULATOR_MODE_IDLE;
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else
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return REGULATOR_MODE_NORMAL;
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}
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static int mt6315_regulator_set_mode(struct regulator_dev *rdev,
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u32 mode)
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{
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struct mt_regulator_init_data *init = rdev_get_drvdata(rdev);
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const struct mt6315_regulator_info *info;
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int ret, val, curr_mode;
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u32 modeset_mask;
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info = container_of(rdev->desc, struct mt6315_regulator_info, desc);
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modeset_mask = init->modeset_mask[rdev_get_id(rdev)];
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curr_mode = mt6315_regulator_get_mode(rdev);
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switch (mode) {
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case REGULATOR_MODE_FAST:
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ret = regmap_update_bits(rdev->regmap,
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MT6315_BUCK_TOP_4PHASE_ANA_CON42,
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modeset_mask,
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modeset_mask);
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break;
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case REGULATOR_MODE_NORMAL:
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if (curr_mode == REGULATOR_MODE_FAST) {
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ret = regmap_update_bits(rdev->regmap,
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MT6315_BUCK_TOP_4PHASE_ANA_CON42,
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modeset_mask,
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0);
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} else if (curr_mode == REGULATOR_MODE_IDLE) {
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ret = regmap_update_bits(rdev->regmap,
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MT6315_BUCK_TOP_CON1,
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info->lp_mode_mask,
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0);
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usleep_range(100, 110);
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} else {
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ret = -EINVAL;
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}
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break;
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case REGULATOR_MODE_IDLE:
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val = MT6315_BUCK_MODE_LP >> 1;
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val <<= info->lp_mode_shift;
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ret = regmap_update_bits(rdev->regmap,
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MT6315_BUCK_TOP_CON1,
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info->lp_mode_mask,
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val);
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break;
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default:
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ret = -EINVAL;
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dev_notice(&rdev->dev, "Unsupported mode: %d\n", mode);
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break;
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}
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if (ret != 0) {
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dev_notice(&rdev->dev, "Failed to set mode: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int mt6315_get_status(struct regulator_dev *rdev)
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{
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const struct mt6315_regulator_info *info;
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int ret;
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u32 regval;
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info = container_of(rdev->desc, struct mt6315_regulator_info, desc);
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ret = regmap_read(rdev->regmap, info->status_reg, ®val);
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if (ret < 0) {
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dev_notice(&rdev->dev, "Failed to get enable reg: %d\n", ret);
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return ret;
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}
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return (regval & BIT(0)) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
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}
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static const struct regulator_ops mt6315_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6315_get_status,
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.set_mode = mt6315_regulator_set_mode,
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.get_mode = mt6315_regulator_get_mode,
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};
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static const struct mt6315_regulator_info mt6315_regulators[MT6315_VBUCK_MAX] = {
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MT_BUCK("vbuck1", MT6315_VBUCK1, MT6315_BUCK_TOP_ELR0),
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MT_BUCK("vbuck2", MT6315_VBUCK2, MT6315_BUCK_TOP_ELR2),
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MT_BUCK("vbuck3", MT6315_VBUCK3, MT6315_BUCK_TOP_ELR4),
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MT_BUCK("vbuck4", MT6315_VBUCK4, MT6315_BUCK_TOP_ELR6),
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};
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static const struct regmap_config mt6315_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = 0x16d0,
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.fast_io = true,
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};
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static const struct of_device_id mt6315_of_match[] = {
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{
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.compatible = "mediatek,mt6315-regulator",
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}, {
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/* sentinel */
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},
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};
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MODULE_DEVICE_TABLE(of, mt6315_of_match);
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static int mt6315_regulator_probe(struct spmi_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct regmap *regmap;
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struct mt6315_chip *chip;
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struct mt_regulator_init_data *init_data;
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struct regulator_config config = {};
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struct regulator_dev *rdev;
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int i;
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regmap = devm_regmap_init_spmi_ext(pdev, &mt6315_regmap_config);
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if (!regmap)
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return -ENODEV;
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chip = devm_kzalloc(dev, sizeof(struct mt6315_chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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init_data = devm_kzalloc(dev, sizeof(struct mt_regulator_init_data), GFP_KERNEL);
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if (!init_data)
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return -ENOMEM;
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switch (pdev->usid) {
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case MT6315_PP:
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init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1) | BIT(MT6315_VBUCK2) |
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BIT(MT6315_VBUCK4);
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break;
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case MT6315_SP:
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case MT6315_RP:
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init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1) | BIT(MT6315_VBUCK2);
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break;
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default:
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init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1);
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break;
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}
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for (i = MT6315_VBUCK2; i < MT6315_VBUCK_MAX; i++)
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init_data->modeset_mask[i] = BIT(i);
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chip->dev = dev;
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chip->regmap = regmap;
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dev_set_drvdata(dev, chip);
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config.dev = dev;
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config.regmap = regmap;
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for (i = MT6315_VBUCK1; i < MT6315_VBUCK_MAX; i++) {
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config.driver_data = init_data;
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rdev = devm_regulator_register(dev, &mt6315_regulators[i].desc, &config);
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if (IS_ERR(rdev)) {
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dev_notice(dev, "Failed to register %s\n", mt6315_regulators[i].desc.name);
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continue;
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}
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}
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return 0;
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}
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static void mt6315_regulator_shutdown(struct spmi_device *pdev)
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{
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struct mt6315_chip *chip = dev_get_drvdata(&pdev->dev);
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int ret = 0;
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ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY_H, PROTECTION_KEY_H);
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ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY, PROTECTION_KEY);
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ret |= regmap_update_bits(chip->regmap, MT6315_TOP2_ELR7, 1, 1);
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ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY, 0);
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ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY_H, 0);
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if (ret < 0)
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dev_notice(&pdev->dev, "[%#x] Failed to enable power off sequence. %d\n",
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pdev->usid, ret);
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}
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static struct spmi_driver mt6315_regulator_driver = {
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.driver = {
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.name = "mt6315-regulator",
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.of_match_table = mt6315_of_match,
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},
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.probe = mt6315_regulator_probe,
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.shutdown = mt6315_regulator_shutdown,
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};
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module_spmi_driver(mt6315_regulator_driver);
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MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>");
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MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6315 PMIC");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,44 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#ifndef __LINUX_REGULATOR_MT6315_H
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#define __LINUX_REGULATOR_MT6315_H
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#define MT6315_RP 3
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#define MT6315_PP 6
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#define MT6315_SP 7
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enum {
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MT6315_VBUCK1 = 0,
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MT6315_VBUCK2,
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MT6315_VBUCK3,
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MT6315_VBUCK4,
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MT6315_VBUCK_MAX,
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};
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/* Register */
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#define MT6315_TOP2_ELR7 0x139
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#define MT6315_TOP_TMA_KEY 0x39F
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#define MT6315_TOP_TMA_KEY_H 0x3A0
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#define MT6315_BUCK_TOP_CON0 0x1440
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#define MT6315_BUCK_TOP_CON1 0x1443
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#define MT6315_BUCK_TOP_ELR0 0x1449
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#define MT6315_BUCK_TOP_ELR2 0x144B
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#define MT6315_BUCK_TOP_ELR4 0x144D
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#define MT6315_BUCK_TOP_ELR6 0x144F
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#define MT6315_VBUCK1_DBG0 0x1499
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#define MT6315_VBUCK1_DBG4 0x149D
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#define MT6315_VBUCK2_DBG0 0x1519
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#define MT6315_VBUCK2_DBG4 0x151D
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#define MT6315_VBUCK3_DBG0 0x1599
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#define MT6315_VBUCK3_DBG4 0x159D
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#define MT6315_VBUCK4_DBG0 0x1619
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#define MT6315_VBUCK4_DBG4 0x161D
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#define MT6315_BUCK_TOP_4PHASE_ANA_CON42 0x16B1
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#define PROTECTION_KEY_H 0x9C
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#define PROTECTION_KEY 0xEA
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#endif /* __LINUX_REGULATOR_MT6315_H */
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