arm64: dts: marvell: add NAND support on the 8040-DB board

Add NAND support on the Armada-8040-DB by adding the same tree as for
the Armada-7040-DB by using the same compatible string
"marvell,armada-8k-nand".

Do not enable the NAND node as enabling it (and changing manually the
proper DPR-76 switch) would disable MDIO from CP1 (and thus disable CPS
Ethernet PHY).

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Miquel Raynal 2017-10-30 14:31:07 +01:00 committed by Gregory CLEMENT
parent 4fbd8d194f
commit 7b31e3ad8b
3 changed files with 47 additions and 1 deletions

View File

@ -268,6 +268,34 @@ partition@f00000 {
};
};
/*
* Proper NAND usage will require DPR-76 to be in position 1-2, which disables
* MDIO signal of CP1.
*/
&cps_nand {
num-cs = <1>;
pinctrl-0 = <&nand_pins>, <&nand_rb>;
pinctrl-names = "default";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
marvell,nand-enable-arbiter;
marvell,system-controller = <&cps_syscon0>;
nand-on-flash-bbt;
partition@0 {
label = "U-Boot";
reg = <0 0x200000>;
};
partition@200000 {
label = "Linux";
reg = <0x200000 0xe00000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
/* CON4 on CP1 expansion */
&cps_sata0 {
status = "okay";

View File

@ -72,5 +72,22 @@ cpm_pinctrl: pinctrl {
&cps_syscon0 {
cps_pinctrl: pinctrl {
compatible = "marvell,armada-8k-cps-pinctrl";
nand_pins: nand-pins {
marvell,pins =
"mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp6", "mpp7",
"mpp8", "mpp9", "mpp10", "mpp11",
"mpp15", "mpp16", "mpp17", "mpp18",
"mpp19", "mpp20", "mpp21", "mpp22",
"mpp23", "mpp24", "mpp25", "mpp26",
"mpp27";
marvell,function = "dev";
};
nand_rb: nand-rb {
marvell,pins = "mpp13", "mpp12";
marvell,function = "nf";
};
};
};

View File

@ -317,12 +317,13 @@ cps_nand: nand@720000 {
* for A7K and on the CPS for A8K.
*/
compatible = "marvell,armada370-nand",
"marvell,armada370-nand";
"marvell,armada-8k-nand";
reg = <0x720000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_clk 1 2>;
marvell,system-controller = <&cpm_syscon0>;
status = "disabled";
};