mirror of https://gitee.com/openkylin/linux.git
This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following: - Robin updates the Northstart 2 DTS to use the generic IOMMU binding - Scott renames the Broadcom Northstar 2 binding document to use a standard name including the brcm vendor prefix - Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the Northstar 2 SVK reference board DTS file with it enabled. - Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the Northstar 2 SoC - Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the Northstar 2 SoC - Ray adds required properties NAND controller properties to make NAND work on the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included here to resolve DTS file merges - Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS - Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3) - Eric defines standard pinctrl groups in the BCM2835 GPIO node - Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes to use their appropriate pinctrl functions - Linus adds names for the Raspberry Pi GPIO lines based on the datasheet - Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block - Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and Device Tree nodes he also uses the proper DTSI file to define the USB host mode for the USB Device Tree nodes -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJYM9SvAAoJEIfQlpxEBwcE80YQAOfjCKEXNSWJEAMpgsCo1oEf 6peBNi+y6AZCkNa+B1L9G2RY1B63OJKb+0HzAzj07cqbfu6r9UGhJEncnvuTnt6Q iLZqoxDAKINNDT4tQBvPfdI8mF7ChNQ1RaJEKRh5/eaz9feKbp0QP216oNyzdOTX 4fUCBfgAxl6q1aNv4f4tcTdy30NllQddulLumYq5W7ElAP3CYeUGszoJ6npDqX6Z p2p42OMczOoU0xDH/a5BJBQW/ZbylCgFOSnGtQp6RnzOB6iBxKYDOCkMRfVLIPSg uC+7XSEpYAxNPRAHE5JxtADEdDKZ4zdKne8SpadixBPY8vAWguEhiOAFRqTKYpXr UY8itk9NMx8BnI6Fl4hU6tFs3Yx9+6PdHX0nWeR1OE2gzYpnVKOdeeS3+nWHctWm Z2wyglSvEpzMpaCzr2/rgDXW30BUTGtRCD7rYJ7MhwItkXm4yIN8pkLw83Zxss4d 3J30QQoQ5s9Fye0Or4Z/PQiw3AtUJnH1u59BAE2GmrHVgs4pUaxuU4lt+LYBZtoM hA+pzFDeNmK/fOumjFhmvZwrCG1AON2cJRExMG6l3x9sxV2FDw1Awr4sina7ZFcO pbkvHmTXcGHNh7kqHeEU51r4tkkA97ZHeKGrntRSfsMNyu74xzOSsjEEf5MKMm5s 2xX2RhehADTDa5xPDJwG =a4fP -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64 Pull "Broadcom devicetree-arm64 changes for 4.10" from Florian Fainelli: This pull request contains Broadcom ARM64 based SoC Device Tree changes for 4.10, please pull the following: - Robin updates the Northstart 2 DTS to use the generic IOMMU binding - Scott renames the Broadcom Northstar 2 binding document to use a standard name including the brcm vendor prefix - Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the Northstar 2 SVK reference board DTS file with it enabled. - Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the Northstar 2 SoC - Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the Northstar 2 SoC - Ray adds required properties NAND controller properties to make NAND work on the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included here to resolve DTS file merges - Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS - Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3) - Eric defines standard pinctrl groups in the BCM2835 GPIO node - Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes to use their appropriate pinctrl functions - Linus adds names for the Raspberry Pi GPIO lines based on the datasheet - Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block - Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and Device Tree nodes he also uses the proper DTSI file to define the USB host mode for the USB Device Tree nodes * tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux: (23 commits) arm64: dts: NS2: Add PCI PHYs arm64: dts: NS2: enable sdio1 ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837 ARM: bcm2835: Add names for the Raspberry Pi GPIO lines ARM: bcm2835: dts: add thermal node to device-tree of bcm283x dt: bindings: add thermal device driver for bcm2835 arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver. ARM: dts: bcm283x: fix typo in mailbox address DT: binding: bcm2835-mbox: fix address typo in example ARM64: dts: bcm2835: Fix bcm2837 compatible string arm64: dts: Update Broadcom NS2 to generic IOMMU binding arm64: dts: Updated NAND DT properties for NS2 SVK arm64: dts: rename ns2.txt to brcm,ns2.txt ARM64: dts: Add QSPI Device Tree node for NS2 ARM64: dts: bcm283x: Use dtsi for USB host mode ARM: dts: bcm283x: drop alt3 from &gpio ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio ...
This commit is contained in:
Arnd Bergmann
commit
7b88f1a489
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@ -12,7 +12,7 @@ Required properties:
|
|||
|
||||
Example:
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||||
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mailbox: mailbox@7e00b800 {
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mailbox: mailbox@7e00b880 {
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compatible = "brcm,bcm2835-mbox";
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reg = <0x7e00b880 0x40>;
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interrupts = <0 1>;
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||||
|
|
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@ -0,0 +1,17 @@
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Binding for Thermal Sensor driver for BCM2835 SoCs.
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||||
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Required parameters:
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||||
-------------------
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compatible: should be one of: "brcm,bcm2835-thermal",
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"brcm,bcm2836-thermal" or "brcm,bcm2837-thermal"
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reg: Address range of the thermal registers.
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clocks: Phandle of the clock used by the thermal sensor.
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Example:
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thermal: thermal@7e212000 {
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compatible = "brcm,bcm2835-thermal";
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reg = <0x7e212000 0x8>;
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clocks = <&clocks BCM2835_CLOCK_TSENS>;
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};
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@ -22,7 +22,72 @@ pwr {
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};
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&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
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/*
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* This is based on the unreleased schematic for the Model A+.
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*
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* Legend:
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* "NC" = not connected (no rail from the SoC)
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* "FOO" = GPIO line named "FOO" on the schematic
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* "FOO_N" = GPIO line named "FOO" on schematic, active low
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*/
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gpio-line-names = "SDA0",
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"SCL0",
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"SDA1",
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"SCL1",
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"GPIO_GCLK",
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"GPIO5",
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"GPIO6",
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"SPI_CE1_N",
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"SPI_CE0_N",
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"SPI_MISO",
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"SPI_MOSI",
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"SPI_SCLK",
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"GPIO12",
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"GPIO13",
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/* Serial port */
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"TXD0",
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"RXD0",
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"GPIO16",
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"GPIO17",
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"GPIO18",
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"GPIO19",
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"GPIO20",
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"GPIO21",
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"GPIO22",
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"GPIO23",
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"GPIO24",
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"GPIO25",
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"GPIO26",
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"GPIO27",
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"SDA0",
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"SCL0",
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"NC", /* GPIO30 */
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"NC", /* GPIO31 */
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"NC", /* GPIO32 */
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"NC", /* GPIO33 */
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"NC", /* GPIO34 */
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"PWR_LOW_N", /* GPIO35 */
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"NC", /* GPIO36 */
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"NC", /* GPIO37 */
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"NC", /* GPIO38 */
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"NC", /* GPIO39 */
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"PWM0_OUT", /* GPIO40 */
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"CAM_GPIO0", /* GPIO41 */
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"NC", /* GPIO42 */
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"NC", /* GPIO43 */
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"NC", /* GPIO44 */
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"PWM1_OUT", /* GPIO45 */
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"HDMI_HPD_N",
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"STATUS_LED",
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/* Used by SD Card */
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"SD_CLK_R",
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"SD_CMD_R",
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"SD_DATA0_R",
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"SD_DATA1_R",
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"SD_DATA2_R",
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"SD_DATA3_R";
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pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
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/* I2S interface */
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i2s_alt0: i2s_alt0 {
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@ -15,7 +15,74 @@ act {
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};
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&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
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/*
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* Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
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* RPI00021 sheet 02
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*
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* Legend:
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* "NC" = not connected (no rail from the SoC)
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* "FOO" = GPIO line named "FOO" on the schematic
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* "FOO_N" = GPIO line named "FOO" on schematic, active low
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*/
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gpio-line-names = "SDA0",
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"SCL0",
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"SDA1",
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"SCL1",
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"GPIO_GCLK",
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"CAM_CLK",
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"LAN_RUN",
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"SPI_CE1_N",
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"SPI_CE0_N",
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"SPI_MISO",
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"SPI_MOSI",
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"SPI_SCLK",
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"NC", /* GPIO12 */
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"NC", /* GPIO13 */
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/* Serial port */
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"TXD0",
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"RXD0",
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"STATUS_LED_N",
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"GPIO17",
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"GPIO18",
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"NC", /* GPIO19 */
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"NC", /* GPIO20 */
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"GPIO21",
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"GPIO22",
|
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"GPIO23",
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"GPIO24",
|
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"GPIO25",
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"NC", /* GPIO26 */
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"CAM_GPIO",
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/* Binary number representing build/revision */
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"CONFIG0",
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"CONFIG1",
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"CONFIG2",
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"CONFIG3",
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"NC", /* GPIO32 */
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"NC", /* GPIO33 */
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"NC", /* GPIO34 */
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"NC", /* GPIO35 */
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"NC", /* GPIO36 */
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"NC", /* GPIO37 */
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"NC", /* GPIO38 */
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"NC", /* GPIO39 */
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"PWM0_OUT",
|
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"NC", /* GPIO41 */
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"NC", /* GPIO42 */
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"NC", /* GPIO43 */
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"NC", /* GPIO44 */
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"PWM1_OUT",
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"HDMI_HPD_P",
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"SD_CARD_DET",
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/* Used by SD Card */
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"SD_CLK_R",
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"SD_CMD_R",
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"SD_DATA0_R",
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"SD_DATA1_R",
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"SD_DATA2_R",
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"SD_DATA3_R";
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pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
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/* I2S interface */
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i2s_alt2: i2s_alt2 {
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@ -23,7 +23,73 @@ pwr {
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};
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&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
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/*
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* Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf
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* RPI-BPLUS sheet 1
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*
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* Legend:
|
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* "NC" = not connected (no rail from the SoC)
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* "FOO" = GPIO line named "FOO" on the schematic
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* "FOO_N" = GPIO line named "FOO" on schematic, active low
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*/
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gpio-line-names = "SDA0",
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"SCL0",
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"SDA1",
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"SCL1",
|
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"GPIO_GCLK",
|
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"GPIO5",
|
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"GPIO6",
|
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"SPI_CE1_N",
|
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"SPI_CE0_N",
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"SPI_MISO",
|
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"SPI_MOSI",
|
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"SPI_SCLK",
|
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"GPIO12",
|
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"GPIO13",
|
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/* Serial port */
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"TXD0",
|
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"RXD0",
|
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"GPIO16",
|
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"GPIO17",
|
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"GPIO18",
|
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"GPIO19",
|
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"GPIO20",
|
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"GPIO21",
|
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"GPIO22",
|
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"GPIO23",
|
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"GPIO24",
|
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"GPIO25",
|
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"GPIO26",
|
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"GPIO27",
|
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"SDA0",
|
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"SCL0",
|
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"NC", /* GPIO30 */
|
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"LAN_RUN", /* GPIO31 */
|
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"CAM_GPIO1", /* GPIO32 */
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"NC", /* GPIO33 */
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"NC", /* GPIO34 */
|
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"PWR_LOW_N", /* GPIO35 */
|
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"NC", /* GPIO36 */
|
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"NC", /* GPIO37 */
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"NC", /* GPIO38 */
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"NC", /* GPIO39 */
|
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"PWM0_OUT", /* GPIO40 */
|
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"CAM_GPIO0", /* GPIO41 */
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"NC", /* GPIO42 */
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"NC", /* GPIO43 */
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"ETHCLK", /* GPIO44 */
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"PWM1_OUT", /* GPIO45 */
|
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"HDMI_HPD_N",
|
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"STATUS_LED",
|
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/* Used by SD Card */
|
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"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
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"SD_DATA1_R",
|
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"SD_DATA2_R",
|
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"SD_DATA3_R";
|
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|
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pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
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|
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/* I2S interface */
|
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i2s_alt0: i2s_alt0 {
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|
|
|
|||
|
|
@ -16,7 +16,73 @@ act {
|
|||
};
|
||||
|
||||
&gpio {
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pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
|
||||
/*
|
||||
* Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf
|
||||
* RPI00022 sheet 02
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
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"GPIO_GCLK",
|
||||
"CAM_CLK",
|
||||
"LAN_RUN",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"NC", /* GPIO12 */
|
||||
"NC", /* GPIO13 */
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"STATUS_LED_N",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"NC", /* GPIO19 */
|
||||
"NC", /* GPIO20 */
|
||||
"CAM_GPIO",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"NC", /* GPIO26 */
|
||||
"GPIO27",
|
||||
"GPIO28",
|
||||
"GPIO29",
|
||||
"GPIO30",
|
||||
"GPIO31",
|
||||
"NC", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"NC", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"NC", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT",
|
||||
"NC", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"PWM1_OUT",
|
||||
"HDMI_HPD_P",
|
||||
"SD_CARD_DET",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt2: i2s_alt2 {
|
||||
|
|
|
|||
|
|
@ -16,7 +16,74 @@ act {
|
|||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &alt3>;
|
||||
/*
|
||||
* Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
|
||||
* RPI00021 sheet 02
|
||||
*
|
||||
* Legend:
|
||||
* "NC" = not connected (no rail from the SoC)
|
||||
* "FOO" = GPIO line named "FOO" on the schematic
|
||||
* "FOO_N" = GPIO line named "FOO" on schematic, active low
|
||||
*/
|
||||
gpio-line-names = "SDA0",
|
||||
"SCL0",
|
||||
"SDA1",
|
||||
"SCL1",
|
||||
"GPIO_GCLK",
|
||||
"CAM_CLK",
|
||||
"LAN_RUN",
|
||||
"SPI_CE1_N",
|
||||
"SPI_CE0_N",
|
||||
"SPI_MISO",
|
||||
"SPI_MOSI",
|
||||
"SPI_SCLK",
|
||||
"NC", /* GPIO12 */
|
||||
"NC", /* GPIO13 */
|
||||
/* Serial port */
|
||||
"TXD0",
|
||||
"RXD0",
|
||||
"STATUS_LED_N",
|
||||
"GPIO17",
|
||||
"GPIO18",
|
||||
"NC", /* GPIO19 */
|
||||
"NC", /* GPIO20 */
|
||||
"GPIO21",
|
||||
"GPIO22",
|
||||
"GPIO23",
|
||||
"GPIO24",
|
||||
"GPIO25",
|
||||
"NC", /* GPIO26 */
|
||||
"CAM_GPIO",
|
||||
/* Binary number representing build/revision */
|
||||
"CONFIG0",
|
||||
"CONFIG1",
|
||||
"CONFIG2",
|
||||
"CONFIG3",
|
||||
"NC", /* GPIO32 */
|
||||
"NC", /* GPIO33 */
|
||||
"NC", /* GPIO34 */
|
||||
"NC", /* GPIO35 */
|
||||
"NC", /* GPIO36 */
|
||||
"NC", /* GPIO37 */
|
||||
"NC", /* GPIO38 */
|
||||
"NC", /* GPIO39 */
|
||||
"PWM0_OUT",
|
||||
"NC", /* GPIO41 */
|
||||
"NC", /* GPIO42 */
|
||||
"NC", /* GPIO43 */
|
||||
"NC", /* GPIO44 */
|
||||
"PWM1_OUT",
|
||||
"HDMI_HPD_P",
|
||||
"SD_CARD_DET",
|
||||
/* Used by SD Card */
|
||||
"SD_CLK_R",
|
||||
"SD_CMD_R",
|
||||
"SD_DATA0_R",
|
||||
"SD_DATA1_R",
|
||||
"SD_DATA2_R",
|
||||
"SD_DATA3_R";
|
||||
|
||||
pinctrl-0 = <&gpioout &alt0>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ act {
|
|||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
|
|
|
|||
|
|
@ -39,22 +39,21 @@ gpioout: gpioout {
|
|||
};
|
||||
|
||||
alt0: alt0 {
|
||||
brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
|
||||
brcm,pins = <4 5 7 8 9 10 11 14 15>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
alt3: alt3 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_gpio0>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_gpio2>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
|
@ -64,11 +63,15 @@ &i2c2 {
|
|||
};
|
||||
|
||||
&sdhci {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_gpio48>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -23,3 +23,9 @@ arm-pmu {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2835-thermal";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ pwr {
|
|||
};
|
||||
|
||||
&gpio {
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
|
||||
pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
|
||||
|
||||
/* I2S interface */
|
||||
i2s_alt0: i2s_alt0 {
|
||||
|
|
|
|||
|
|
@ -76,3 +76,9 @@ &intc {
|
|||
interrupt-parent = <&local_intc>;
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2836-thermal";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -104,7 +104,7 @@ rng@7e104000 {
|
|||
reg = <0x7e104000 0x10>;
|
||||
};
|
||||
|
||||
mailbox: mailbox@7e00b800 {
|
||||
mailbox: mailbox@7e00b880 {
|
||||
compatible = "brcm,bcm2835-mbox";
|
||||
reg = <0x7e00b880 0x40>;
|
||||
interrupts = <0 1>;
|
||||
|
|
@ -132,6 +132,209 @@ gpio: gpio@7e200000 {
|
|||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
/* Defines pin muxing groups according to
|
||||
* BCM2835-ARM-Peripherals.pdf page 102.
|
||||
*
|
||||
* While each pin can have its mux selected
|
||||
* for various functions individually, some
|
||||
* groups only make sense to switch to a
|
||||
* particular function together.
|
||||
*/
|
||||
dpi_gpio0: dpi_gpio0 {
|
||||
brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
|
||||
12 13 14 15 16 17 18 19
|
||||
20 21 22 23 24 25 26 27>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
emmc_gpio22: emmc_gpio22 {
|
||||
brcm,pins = <22 23 24 25 26 27>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
emmc_gpio34: emmc_gpio34 {
|
||||
brcm,pins = <34 35 36 37 38 39>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
brcm,pull = <BCM2835_PUD_OFF
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP
|
||||
BCM2835_PUD_UP>;
|
||||
};
|
||||
emmc_gpio48: emmc_gpio48 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
|
||||
gpclk0_gpio4: gpclk0_gpio4 {
|
||||
brcm,pins = <4>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk1_gpio5: gpclk1_gpio5 {
|
||||
brcm,pins = <5>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk1_gpio42: gpclk1_gpio42 {
|
||||
brcm,pins = <42>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk1_gpio44: gpclk1_gpio44 {
|
||||
brcm,pins = <44>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk2_gpio6: gpclk2_gpio6 {
|
||||
brcm,pins = <6>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
gpclk2_gpio43: gpclk2_gpio43 {
|
||||
brcm,pins = <43>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
i2c0_gpio0: i2c0_gpio0 {
|
||||
brcm,pins = <0 1>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
i2c0_gpio32: i2c0_gpio32 {
|
||||
brcm,pins = <32 34>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
i2c0_gpio44: i2c0_gpio44 {
|
||||
brcm,pins = <44 45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT1>;
|
||||
};
|
||||
i2c1_gpio2: i2c1_gpio2 {
|
||||
brcm,pins = <2 3>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
i2c1_gpio44: i2c1_gpio44 {
|
||||
brcm,pins = <44 45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
i2c_slave_gpio18: i2c_slave_gpio18 {
|
||||
brcm,pins = <18 19 20 21>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
|
||||
jtag_gpio4: jtag_gpio4 {
|
||||
brcm,pins = <4 5 6 12 13>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
jtag_gpio22: jtag_gpio22 {
|
||||
brcm,pins = <22 23 24 25 26 27>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
|
||||
pcm_gpio18: pcm_gpio18 {
|
||||
brcm,pins = <18 19 20 21>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pcm_gpio28: pcm_gpio28 {
|
||||
brcm,pins = <28 29 30 31>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
|
||||
pwm0_gpio12: pwm0_gpio12 {
|
||||
brcm,pins = <12>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm0_gpio18: pwm0_gpio18 {
|
||||
brcm,pins = <18>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
pwm0_gpio40: pwm0_gpio40 {
|
||||
brcm,pins = <40>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm1_gpio13: pwm1_gpio13 {
|
||||
brcm,pins = <13>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm1_gpio19: pwm1_gpio19 {
|
||||
brcm,pins = <19>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
pwm1_gpio41: pwm1_gpio41 {
|
||||
brcm,pins = <41>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
pwm1_gpio45: pwm1_gpio45 {
|
||||
brcm,pins = <45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
sdhost_gpio48: sdhost_gpio48 {
|
||||
brcm,pins = <48 49 50 51 52 53>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
|
||||
spi0_gpio7: spi0_gpio7 {
|
||||
brcm,pins = <7 8 9 10 11>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
spi0_gpio35: spi0_gpio35 {
|
||||
brcm,pins = <35 36 37 38 39>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
spi1_gpio16: spi1_gpio16 {
|
||||
brcm,pins = <16 17 18 19 20 21>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
spi2_gpio40: spi2_gpio40 {
|
||||
brcm,pins = <40 41 42 43 44 45>;
|
||||
brcm,function = <BCM2835_FSEL_ALT4>;
|
||||
};
|
||||
|
||||
uart0_gpio14: uart0_gpio14 {
|
||||
brcm,pins = <14 15>;
|
||||
brcm,function = <BCM2835_FSEL_ALT0>;
|
||||
};
|
||||
/* Separate from the uart0_gpio14 group
|
||||
* because it conflicts with spi1_gpio16, and
|
||||
* people often run uart0 on the two pins
|
||||
* without flow contrl.
|
||||
*/
|
||||
uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
|
||||
brcm,pins = <16 17>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
uart0_gpio30: uart0_gpio30 {
|
||||
brcm,pins = <30 31>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
|
||||
brcm,pins = <32 33>;
|
||||
brcm,function = <BCM2835_FSEL_ALT3>;
|
||||
};
|
||||
|
||||
uart1_gpio14: uart1_gpio14 {
|
||||
brcm,pins = <14 15>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
|
||||
brcm,pins = <16 17>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_gpio32: uart1_gpio32 {
|
||||
brcm,pins = <32 33>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
|
||||
brcm,pins = <30 31>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_gpio36: uart1_gpio36 {
|
||||
brcm,pins = <36 37 38 39>;
|
||||
brcm,function = <BCM2835_FSEL_ALT2>;
|
||||
};
|
||||
uart1_gpio40: uart1_gpio40 {
|
||||
brcm,pins = <40 41>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
|
||||
brcm,pins = <42 43>;
|
||||
brcm,function = <BCM2835_FSEL_ALT5>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0: serial@7e201000 {
|
||||
|
|
@ -187,6 +390,13 @@ pixelvalve@7e207000 {
|
|||
interrupts = <2 14>; /* pwa1 */
|
||||
};
|
||||
|
||||
thermal: thermal@7e212000 {
|
||||
compatible = "brcm,bcm2835-thermal";
|
||||
reg = <0x7e212000 0x8>;
|
||||
clocks = <&clocks BCM2835_CLOCK_TSENS>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
aux: aux@0x7e215000 {
|
||||
compatible = "brcm,bcm2835-aux";
|
||||
#clock-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
#include "bcm2837.dtsi"
|
||||
#include "bcm2835-rpi.dtsi"
|
||||
#include "bcm283x-rpi-smsc9514.dtsi"
|
||||
#include "bcm283x-rpi-usb-host.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
|
||||
|
|
@ -15,13 +16,6 @@ leds {
|
|||
act {
|
||||
gpios = <&gpio 47 0>;
|
||||
};
|
||||
|
||||
pwr {
|
||||
label = "PWR";
|
||||
gpios = <&gpio 35 0>;
|
||||
default-state = "keep";
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#include "bcm283x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "brcm,bcm2836";
|
||||
compatible = "brcm,bcm2837";
|
||||
|
||||
soc {
|
||||
ranges = <0x7e000000 0x3f000000 0x1000000>,
|
||||
|
|
@ -74,3 +74,9 @@ &intc {
|
|||
interrupt-parent = <&local_intc>;
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
/* enable thermal sensor with the correct compatible property set */
|
||||
&thermal {
|
||||
compatible = "brcm,bcm2837-thermal";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
../../../../arm/boot/dts/bcm283x-rpi-usb-host.dtsi
|
||||
|
|
@ -157,6 +157,10 @@ &sdio0 {
|
|||
status = "ok";
|
||||
};
|
||||
|
||||
&sdio1 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&nand {
|
||||
nandcs@0 {
|
||||
compatible = "brcm,nandcs";
|
||||
|
|
@ -187,3 +191,37 @@ nand_sel: nand_sel {
|
|||
groups = "nand_grp";
|
||||
};
|
||||
};
|
||||
|
||||
&qspi {
|
||||
bspi-sel = <0>;
|
||||
flash: m25p80@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "m25p80";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <12500000>;
|
||||
m25p,fast-read;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
|
||||
partition@0 {
|
||||
label = "boot";
|
||||
reg = <0x00000000 0x000a0000>;
|
||||
};
|
||||
|
||||
partition@a0000 {
|
||||
label = "env";
|
||||
reg = <0x000a0000 0x00060000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "system";
|
||||
reg = <0x00100000 0x00600000>;
|
||||
};
|
||||
|
||||
partition@700000 {
|
||||
label = "rootfs";
|
||||
reg = <0x00700000 0x01900000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -133,6 +133,9 @@ pcie0: pcie@20020000 {
|
|||
|
||||
status = "disabled";
|
||||
|
||||
phys = <&pci_phy0>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
msi-parent = <&msi0>;
|
||||
msi0: msi@20020000 {
|
||||
compatible = "brcm,iproc-msi";
|
||||
|
|
@ -171,6 +174,9 @@ pcie4: pcie@50020000 {
|
|||
|
||||
status = "disabled";
|
||||
|
||||
phys = <&pci_phy1>;
|
||||
phy-names = "pcie-phy";
|
||||
|
||||
msi-parent = <&msi4>;
|
||||
msi4: msi@50020000 {
|
||||
compatible = "brcm,iproc-msi";
|
||||
|
|
@ -191,6 +197,42 @@ soc: soc {
|
|||
|
||||
#include "ns2-clock.dtsi"
|
||||
|
||||
pdc0: iproc-pdc0@612c0000 {
|
||||
compatible = "brcm,iproc-pdc-mbox";
|
||||
reg = <0x612c0000 0x445>; /* PDC FS0 regs */
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
||||
pdc1: iproc-pdc1@612e0000 {
|
||||
compatible = "brcm,iproc-pdc-mbox";
|
||||
reg = <0x612e0000 0x445>; /* PDC FS1 regs */
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
||||
pdc2: iproc-pdc2@61300000 {
|
||||
compatible = "brcm,iproc-pdc-mbox";
|
||||
reg = <0x61300000 0x445>; /* PDC FS2 regs */
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
||||
pdc3: iproc-pdc3@61320000 {
|
||||
compatible = "brcm,iproc-pdc-mbox";
|
||||
reg = <0x61320000 0x445>; /* PDC FS3 regs */
|
||||
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
brcm,rx-status-len = <32>;
|
||||
brcm,use-bcm-hdr;
|
||||
};
|
||||
|
||||
dma0: dma@61360000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x61360000 0x1000>;
|
||||
|
|
@ -248,7 +290,7 @@ smmu: mmu@64000000 {
|
|||
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
|
||||
mmu-masters;
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@6501d130 {
|
||||
|
|
@ -565,5 +607,23 @@ nand: nand@66460000 {
|
|||
|
||||
brcm,nand-has-wp;
|
||||
};
|
||||
|
||||
qspi: spi@66470200 {
|
||||
compatible = "brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi";
|
||||
reg = <0x66470200 0x184>,
|
||||
<0x66470000 0x124>,
|
||||
<0x67017408 0x004>,
|
||||
<0x664703a0 0x01c>;
|
||||
reg-names = "mspi", "bspi", "intr_regs",
|
||||
"intr_status_reg";
|
||||
interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "spi_l1_intr";
|
||||
clocks = <&iprocmed>;
|
||||
clock-names = "iprocmed";
|
||||
num-cs = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
|
|||
BCM2835_PINCONF_PARAM_PULL,
|
||||
};
|
||||
|
||||
enum bcm2835_pinconf_pull {
|
||||
BCM2835_PINCONFIG_PULL_NONE,
|
||||
BCM2835_PINCONFIG_PULL_DOWN,
|
||||
BCM2835_PINCONFIG_PULL_UP,
|
||||
};
|
||||
|
||||
#define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
|
||||
#define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
|
||||
#define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
|
||||
|
|
|
|||
|
|
@ -24,4 +24,9 @@
|
|||
#define BCM2835_FSEL_ALT2 6
|
||||
#define BCM2835_FSEL_ALT3 7
|
||||
|
||||
/* brcm,pull property */
|
||||
#define BCM2835_PUD_OFF 0
|
||||
#define BCM2835_PUD_DOWN 1
|
||||
#define BCM2835_PUD_UP 2
|
||||
|
||||
#endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue