mirror of https://gitee.com/openkylin/linux.git
drm/i915: HDMI/DP - ELD info refresh support for Haswell
ELD info should be updated dynamically according to hot plug event. For haswell chip, clear/set the eld valid bit and output enable bit from callback intel_disable/eanble_ddi(). Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Wang Xingchao <xingchao.wang@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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9943393195
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7b9f35a6dd
drivers/gpu/drm/i915
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@ -677,6 +677,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
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DRM_DEBUG_KMS("Preparing DDI mode for Haswell on port %c, pipe %c\n",
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port_name(port), pipe_name(pipe));
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intel_crtc->eld_vld = false;
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if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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@ -1287,10 +1288,14 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder)
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static void intel_enable_ddi(struct intel_encoder *intel_encoder)
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{
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struct drm_encoder *encoder = &intel_encoder->base;
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struct drm_crtc *crtc = encoder->crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_crtc->pipe;
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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enum port port = intel_ddi_get_encoder_port(intel_encoder);
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int type = intel_encoder->type;
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uint32_t tmp;
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if (type == INTEL_OUTPUT_HDMI) {
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/* In HDMI/DVI mode, the port width, and swing/emphasis values
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@ -1303,18 +1308,34 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
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ironlake_edp_backlight_on(intel_dp);
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}
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if (intel_crtc->eld_vld) {
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tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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tmp |= ((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4));
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I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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}
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}
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static void intel_disable_ddi(struct intel_encoder *intel_encoder)
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{
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struct drm_encoder *encoder = &intel_encoder->base;
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struct drm_crtc *crtc = encoder->crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_crtc->pipe;
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int type = intel_encoder->type;
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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uint32_t tmp;
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if (type == INTEL_OUTPUT_EDP) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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ironlake_edp_backlight_off(intel_dp);
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}
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tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
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tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4));
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I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
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}
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int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
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@ -3721,10 +3721,12 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
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struct drm_device *dev = crtc->dev;
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struct drm_connector *connector;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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/* crtc should still be enabled when we disable it. */
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WARN_ON(!crtc->enabled);
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intel_crtc->eld_vld = false;
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dev_priv->display.crtc_disable(crtc);
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intel_crtc_update_sarea(crtc, false);
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dev_priv->display.off(crtc);
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@ -5792,6 +5794,7 @@ static void haswell_write_eld(struct drm_connector *connector,
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struct drm_i915_private *dev_priv = connector->dev->dev_private;
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uint8_t *eld = connector->eld;
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struct drm_device *dev = crtc->dev;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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uint32_t eldv;
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uint32_t i;
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int len;
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@ -5833,6 +5836,7 @@ static void haswell_write_eld(struct drm_connector *connector,
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DRM_DEBUG_DRIVER("ELD on pipe %c\n", pipe_name(pipe));
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eldv = AUDIO_ELD_VALID_A << (pipe * 4);
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intel_crtc->eld_vld = true;
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) {
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DRM_DEBUG_DRIVER("ELD: DisplayPort detected\n");
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@ -211,6 +211,7 @@ struct intel_crtc {
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* some outputs connected to this crtc.
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*/
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bool active;
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bool eld_vld;
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bool primary_disabled; /* is the crtc obscured by a plane? */
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bool lowfreq_avail;
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struct intel_overlay *overlay;
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