mirror of https://gitee.com/openkylin/linux.git
STi SoC updates for v4.3, round 1.
Highlights: ----------- - Add code to release secondary cores from holding pen. - Remove useless call to trace_hardirqs_off() in secondary core init function. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVr48oAAoJEMo4jShGhw+JmpYP/RH/9EPvUSsOEYlRYNGlGfz8 FxnBitLnPiEStK/Iu0gsAgDJLiz5GriXM/DGUSZxlRCDPfLcvXEvO9yrQ03HwKhx dJWkpeUGBmHgjLCbrHuUB83KxhDpKeC7RdoQUBKWY13top5DIO/EbzMYuHzxG6nW gbVpGi88gCWvVR076gui95PAOLM4hY6enhUKoePQT/Pln6A/qp4dTCb0eVJpMMbm VTXis8114jPoivTUNHy4lT9R27SjBLfvXMa6jLZwvFJ70eHc+7cN/kXamKnhyerD ogmz3XlUEcqzm3guYsohtE6sCLrOF8tQRGo/qA8t8hQQ+DK0yLimDmqM5C6uxZF1 NIoLfETyuvXngroVBZrqQ3bL5CeXgHT4FJfp+pfdxz6YxpGEM5FRn4oorM6bPHWU dsR/7u/Qi3CJ14L1WA7C2VmIlsOCL8tHDhDRsVpEciN6UBRpiCCjVtYrJSOee7er u0J3/SKsdaCGmULZLN2aveqzai6QHpYNEEZP8d6yikGUAhAhFwWslX9EfgKmUW6N uNsDmqe5G+mG753ni3tSbr0FUALp69QeqQTkMYlmNsMdaFRdzMkjkbvQlCc6oyVf N3TMp73EwRrMZ/h9o6OX0pp6t1iVwmpqgs8slb5IBrK+a04cck4DYPYQvvQ+c1vi KwdoGauAvnvCGE0XZtBq =KbCI -----END PGP SIGNATURE----- Merge tag 'sti-soc-for-v4.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/soc STi SoC updates for v4.3, round 1. Highlights: ----------- - Add code to release secondary cores from holding pen. - Remove useless call to trace_hardirqs_off() in secondary core init function. * tag 'sti-soc-for-v4.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti: ARM: STi: Remove platform call to trace_hardirqs_off() ARM: STi: Add code to release secondary cores from holding pen. Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
7bd1584bd5
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@ -37,6 +37,7 @@ pen: ldr r7, [r6]
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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ENDPROC(sti_secondary_startup)
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1: .long .
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.long pen_release
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@ -20,6 +20,7 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/memblock.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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@ -38,8 +39,6 @@ static DEFINE_SPINLOCK(boot_lock);
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static void sti_secondary_init(unsigned int cpu)
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{
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trace_hardirqs_off();
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/*
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* let the primary processor know we're out of the
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* pen, then head off into the C entry point
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@ -99,14 +98,62 @@ static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
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static void __init sti_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *scu_base = NULL;
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struct device_node *np = of_find_compatible_node(
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NULL, NULL, "arm,cortex-a9-scu");
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struct device_node *np;
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void __iomem *scu_base;
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u32 __iomem *cpu_strt_ptr;
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u32 release_phys;
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int cpu;
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unsigned long entry_pa = virt_to_phys(sti_secondary_startup);
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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if (np) {
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scu_base = of_iomap(np, 0);
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scu_enable(scu_base);
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of_node_put(np);
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}
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if (max_cpus <= 1)
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return;
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for_each_possible_cpu(cpu) {
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np = of_get_cpu_node(cpu, NULL);
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if (!np)
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continue;
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if (of_property_read_u32(np, "cpu-release-addr",
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&release_phys)) {
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pr_err("CPU %d: missing or invalid cpu-release-addr "
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"property\n", cpu);
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continue;
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}
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/*
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* holding pen is usually configured in SBC DMEM but can also be
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* in RAM.
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*/
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if (!memblock_is_memory(release_phys))
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cpu_strt_ptr =
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ioremap(release_phys, sizeof(release_phys));
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else
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cpu_strt_ptr =
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(u32 __iomem *)phys_to_virt(release_phys);
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__raw_writel(entry_pa, cpu_strt_ptr);
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/*
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* wmb so that data is actually written
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* before cache flush is done
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*/
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smp_wmb();
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sync_cache_w(cpu_strt_ptr);
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if (!memblock_is_memory(release_phys))
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iounmap(cpu_strt_ptr);
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}
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}
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struct smp_operations __initdata sti_smp_ops = {
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@ -14,4 +14,6 @@
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extern struct smp_operations sti_smp_ops;
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void sti_secondary_startup(void);
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#endif
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