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pinctrl: sirf: remove sirfsoc_gpio_set_pull function 

The prima2 platform advertises needing no mach/gpio.h header file,
but its pinctrl driver now has a sirfsoc_gpio_set_pull function
that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h,
which fails to build.

Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the
kernel, so we can safely remove it. Any out of tree drivers using
it will have to be converted to use proper pinctrl functions to
do the same.

Without this patch, building prima2_defconfig results in:

drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull':
drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function)
drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in
drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function)
drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Arnd Bergmann 2012-10-09 15:35:56 +00:00 committed by Linus Walleij
parent 3ee73aa077
commit 7bec207427
2 changed files with 0 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/mach-prima2/include/mach/gpio.h
View File

@ -1,13 +0,0 @@
#ifndef __MACH_GPIO_H
#define __MACH_GPIO_H
/* Pull up/down values */
enum sirfsoc_gpio_pull {
SIRFSOC_GPIO_PULL_NONE,
SIRFSOC_GPIO_PULL_UP,
SIRFSOC_GPIO_PULL_DOWN,
};
void sirfsoc_gpio_set_pull(unsigned gpio, unsigned mode);
#endif

35
drivers/pinctrl/pinctrl-sirf.c
View File

@ -1323,41 +1323,6 @@ static inline struct sirfsoc_gpio_bank *sirfsoc_gpio_to_bank(unsigned int gpio)
return &sgpio_bank[gpio / SIRFSOC_GPIO_BANK_SIZE];
}
void sirfsoc_gpio_set_pull(unsigned gpio, unsigned mode)
{
struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(gpio);
int idx = sirfsoc_gpio_to_offset(gpio);
u32 val, offset;
unsigned long flags;
offset = SIRFSOC_GPIO_CTRL(bank->id, idx);
spin_lock_irqsave(&sgpio_lock, flags);
val = readl(bank->chip.regs + offset);
switch (mode) {
case SIRFSOC_GPIO_PULL_NONE:
val &= ~SIRFSOC_GPIO_CTL_PULL_MASK;
break;
case SIRFSOC_GPIO_PULL_UP:
val |= SIRFSOC_GPIO_CTL_PULL_MASK;
val |= SIRFSOC_GPIO_CTL_PULL_HIGH;
break;
case SIRFSOC_GPIO_PULL_DOWN:
val |= SIRFSOC_GPIO_CTL_PULL_MASK;
val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH;
break;
default:
break;
}
writel(val, bank->chip.regs + offset);
spin_unlock_irqrestore(&sgpio_lock, flags);
}
EXPORT_SYMBOL(sirfsoc_gpio_set_pull);
static inline struct sirfsoc_gpio_bank *sirfsoc_irqchip_to_bank(struct gpio_chip *chip)
{
return container_of(to_of_mm_gpio_chip(chip), struct sirfsoc_gpio_bank, chip);