clk: sunxi-ng: Implement global pre-divider

Some clocks have a global pre-divider that applies to all their parents.

Since it might also apply to clocks that have a single parent, this is
merged in the ccu_common structure, unlike the other pre-divider settings
that are tied to a specific index, and thus a specific parent.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Maxime Ripard 2017-01-19 22:49:26 +01:00
parent 0c3c8e1358
commit 7c09b85896
2 changed files with 9 additions and 1 deletions

View File

@ -21,6 +21,7 @@
#define CCU_FEATURE_VARIABLE_PREDIV BIT(1)
#define CCU_FEATURE_FIXED_PREDIV BIT(2)
#define CCU_FEATURE_FIXED_POSTDIV BIT(3)
#define CCU_FEATURE_ALL_PREDIV BIT(4)
struct device_node;
@ -56,6 +57,7 @@ struct device_node;
struct ccu_common {
void __iomem *base;
u16 reg;
u32 prediv;
unsigned long features;
spinlock_t *lock;

View File

@ -25,9 +25,15 @@ void ccu_mux_helper_adjust_parent_for_prediv(struct ccu_common *common,
int i;
if (!((common->features & CCU_FEATURE_FIXED_PREDIV) ||
(common->features & CCU_FEATURE_VARIABLE_PREDIV)))
(common->features & CCU_FEATURE_VARIABLE_PREDIV) ||
(common->features & CCU_FEATURE_ALL_PREDIV)))
return;
if (common->features & CCU_FEATURE_ALL_PREDIV) {
*parent_rate = *parent_rate / common->prediv;
return;
}
reg = readl(common->base + common->reg);
if (parent_index < 0) {
parent_index = reg >> cm->shift;