mirror of https://gitee.com/openkylin/linux.git
[ARM] 4934/1: AT91CAP9 UDPHS driver: board and cpu integration.
This is patch 2 of 2 adding support for the USB High Speed Device Port on the AT91CAP9 system on chip. The AT91CAP9 uses the same UDPHS IP as the AVR32 and the AT91SAM9RL. This patch declares the UDPHS ressources in the at91cap9 (cpu and adk board) files, wires up the atmel_usba_udc driver to them, and activates the driver in the defconfig. Signed-off-by: Stelian Pop <stelian@popies.net> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Stelian Pop
Russell King
parent
53d7168026
commit
7c8cf66529
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@ -907,7 +907,32 @@ CONFIG_USB_MON=y
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#
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# USB Gadget Support
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#
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# CONFIG_USB_GADGET is not set
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CONFIG_USB_GADGET=y
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# CONFIG_USB_GADGET_DEBUG is not set
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# CONFIG_USB_GADGET_DEBUG_FILES is not set
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CONFIG_USB_GADGET_SELECTED=y
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# CONFIG_USB_GADGET_AMD5536UDC is not set
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CONFIG_USB_GADGET_ATMEL_USBA=y
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CONFIG_USB_ATMEL_USBA=y
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# CONFIG_USB_GADGET_FSL_USB2 is not set
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# CONFIG_USB_GADGET_NET2280 is not set
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# CONFIG_USB_GADGET_PXA2XX is not set
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# CONFIG_USB_GADGET_M66592 is not set
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# CONFIG_USB_GADGET_GOKU is not set
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# CONFIG_USB_GADGET_LH7A40X is not set
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# CONFIG_USB_GADGET_OMAP is not set
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# CONFIG_USB_GADGET_S3C2410 is not set
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# CONFIG_USB_GADGET_AT91 is not set
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# CONFIG_USB_GADGET_DUMMY_HCD is not set
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CONFIG_USB_GADGET_DUALSPEED=y
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# CONFIG_USB_ZERO is not set
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CONFIG_USB_ETH=m
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CONFIG_USB_ETH_RNDIS=y
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# CONFIG_USB_GADGETFS is not set
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CONFIG_USB_FILE_STORAGE=m
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# CONFIG_USB_FILE_STORAGE_TEST is not set
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# CONFIG_USB_G_SERIAL is not set
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# CONFIG_USB_MIDI_GADGET is not set
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CONFIG_MMC=y
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# CONFIG_MMC_DEBUG is not set
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# CONFIG_MMC_UNSAFE_RESUME is not set
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@ -83,6 +83,105 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* USB HS Device (Gadget)
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
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static struct resource usba_udc_resources[] = {
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[0] = {
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.start = AT91CAP9_UDPHS_FIFO,
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.end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91CAP9_BASE_UDPHS,
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.end = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = AT91CAP9_ID_UDPHS,
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.end = AT91CAP9_ID_UDPHS,
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.flags = IORESOURCE_IRQ,
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},
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};
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#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
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[idx] = { \
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.name = nam, \
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.index = idx, \
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.fifo_size = maxpkt, \
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.nr_banks = maxbk, \
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.can_dma = dma, \
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.can_isoc = isoc, \
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}
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static struct usba_ep_data usba_udc_ep[] = {
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EP("ep0", 0, 64, 1, 0, 0),
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EP("ep1", 1, 1024, 3, 1, 1),
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EP("ep2", 2, 1024, 3, 1, 1),
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EP("ep3", 3, 1024, 2, 1, 1),
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EP("ep4", 4, 1024, 2, 1, 1),
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EP("ep5", 5, 1024, 2, 1, 0),
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EP("ep6", 6, 1024, 2, 1, 0),
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EP("ep7", 7, 1024, 2, 0, 0),
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};
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#undef EP
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/*
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* pdata doesn't have room for any endpoints, so we need to
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* append room for the ones we need right after it.
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*/
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static struct {
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struct usba_platform_data pdata;
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struct usba_ep_data ep[8];
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} usba_udc_data;
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static struct platform_device at91_usba_udc_device = {
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.name = "atmel_usba_udc",
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.id = -1,
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.dev = {
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.platform_data = &usba_udc_data.pdata,
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},
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.resource = usba_udc_resources,
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.num_resources = ARRAY_SIZE(usba_udc_resources),
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};
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void __init at91_add_device_usba(struct usba_platform_data *data)
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{
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at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
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AT91_MATRIX_UDPHS_BYPASS_LOCK);
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/*
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* Invalid pins are 0 on AT91, but the usba driver is shared
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* with AVR32, which use negative values instead. Once/if
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* gpio_is_valid() is ported to AT91, revisit this code.
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*/
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usba_udc_data.pdata.vbus_pin = -EINVAL;
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usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
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memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
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if (data && data->vbus_pin > 0) {
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at91_set_gpio_input(data->vbus_pin, 0);
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at91_set_deglitch(data->vbus_pin, 1);
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usba_udc_data.pdata.vbus_pin = data->vbus_pin;
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}
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/* Pullup pin is handled internally by USB device peripheral */
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/* Clocks */
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at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
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at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
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platform_device_register(&at91_usba_udc_device);
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}
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#else
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void __init at91_add_device_usba(struct usba_platform_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* Ethernet
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* -------------------------------------------------------------------- */
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@ -78,6 +78,12 @@ static struct at91_usbh_data __initdata cap9adk_usbh_data = {
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.ports = 2,
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};
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/*
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* USB HS Device port
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*/
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static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
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.vbus_pin = AT91_PIN_PB31,
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};
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/*
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* ADS7846 Touchscreen
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@ -326,6 +332,9 @@ static void __init cap9adk_board_init(void)
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/* USB Host */
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set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
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at91_add_device_usbh(&cap9adk_usbh_data);
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/* USB HS */
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set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH);
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at91_add_device_usba(&cap9adk_usba_udc_data);
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/* SPI */
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at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
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/* Touchscreen */
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@ -118,7 +118,7 @@
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#define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */
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#define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */
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#define AT91CAP9_UDPHS_BASE 0x00600000 /* USB High Speed Device Port */
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#define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */
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#define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */
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#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6
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@ -106,6 +106,11 @@
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#define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */
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#define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */
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#define AT91_MATRIX_UDPHS (AT91_MATRIX + 0x118) /* USBHS Special Function Register [AT91CAP9 only] */
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#define AT91_MATRIX_SELECT_UDPHS (0 << 31) /* select High Speed UDP */
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#define AT91_MATRIX_SELECT_UDP (1 << 31) /* select standard UDP */
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#define AT91_MATRIX_UDPHS_BYPASS_LOCK (1 << 30) /* bypass lock bit */
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#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */
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#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
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#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
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