mirror of https://gitee.com/openkylin/linux.git
ARM: S3C24XX: Add extended GPIO used on S3C2443 and beyond
Add the GPIO banks that are used on the S3C2443 and above to the list of available GPIOS. Currently we do not have any limit on the SoC GPIO, so these are being registered whether the SoC has them or not. It is currently up to the user not to try and use them. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -34,6 +34,10 @@
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#define S3C2410_GPIO_F_NR (32)
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#define S3C2410_GPIO_F_NR (32)
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#define S3C2410_GPIO_G_NR (32)
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#define S3C2410_GPIO_G_NR (32)
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#define S3C2410_GPIO_H_NR (32)
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#define S3C2410_GPIO_H_NR (32)
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#define S3C2410_GPIO_J_NR (32) /* technically 16. */
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#define S3C2410_GPIO_K_NR (32) /* technically 16. */
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#define S3C2410_GPIO_L_NR (32) /* technically 15. */
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#define S3C2410_GPIO_M_NR (32) /* technically 2. */
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#if CONFIG_S3C_GPIO_SPACE != 0
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#if CONFIG_S3C_GPIO_SPACE != 0
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#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
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#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
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@ -53,6 +57,10 @@ enum s3c_gpio_number {
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S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
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S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
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S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
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S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
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S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
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S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
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S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
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S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
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S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
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S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
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};
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};
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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@ -67,6 +75,10 @@ enum s3c_gpio_number {
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#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
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#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
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#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
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#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
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#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
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#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
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#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
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#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
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#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
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#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
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/* compatibility until drivers can be modified */
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/* compatibility until drivers can be modified */
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@ -639,6 +639,23 @@
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* for the 2412/2413 from the 2410/2440/2442
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* for the 2412/2413 from the 2410/2440/2442
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*/
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*/
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/* S3C2443 and above */
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#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0)
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#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4)
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#define S3C2440_GPJUP S3C2410_GPIOREG(0xD8)
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#define S3C2443_GPKCON S3C2410_GPIOREG(0xE0)
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#define S3C2443_GPKDAT S3C2410_GPIOREG(0xE4)
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#define S3C2443_GPKUP S3C2410_GPIOREG(0xE8)
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#define S3C2443_GPLCON S3C2410_GPIOREG(0xF0)
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#define S3C2443_GPLDAT S3C2410_GPIOREG(0xF4)
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#define S3C2443_GPLUP S3C2410_GPIOREG(0xF8)
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#define S3C2443_GPMCON S3C2410_GPIOREG(0x100)
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#define S3C2443_GPMDAT S3C2410_GPIOREG(0x104)
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#define S3C2443_GPMUP S3C2410_GPIOREG(0x108)
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/* miscellaneous control */
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/* miscellaneous control */
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#define S3C2400_MISCCR S3C2410_GPIOREG(0x54)
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#define S3C2400_MISCCR S3C2410_GPIOREG(0x54)
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#define S3C2410_MISCCR S3C2410_GPIOREG(0x80)
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#define S3C2410_MISCCR S3C2410_GPIOREG(0x80)
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@ -24,10 +24,6 @@
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#define S3C2440_GPIO_BANKJ (416)
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#define S3C2440_GPIO_BANKJ (416)
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#define S3C2440_GPJCON S3C2410_GPIOREG(0xd0)
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#define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4)
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#define S3C2440_GPJUP S3C2410_GPIOREG(0xd8)
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#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
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#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
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#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
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#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
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#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
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#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
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@ -1,6 +1,6 @@
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/* linux/arch/arm/plat-s3c24xx/gpiolib.c
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/* linux/arch/arm/plat-s3c24xx/gpiolib.c
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*
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*
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* Copyright (c) 2008 Simtec Electronics
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* Copyright (c) 2008-2010 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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* Ben Dooks <ben@simtec.co.uk>
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*
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*
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@ -172,8 +172,47 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
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.ngpio = 11,
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.ngpio = 11,
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},
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},
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},
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},
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/* GPIOS for the S3C2443 and later devices. */
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{
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.base = S3C2440_GPJCON,
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.pm = __gpio_pm(&s3c_gpio_pm_2bit),
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.chip = {
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.base = S3C2410_GPJ(0),
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.owner = THIS_MODULE,
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.label = "GPIOJ",
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.ngpio = 16,
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},
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}, {
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.base = S3C2443_GPKCON,
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.pm = __gpio_pm(&s3c_gpio_pm_2bit),
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.chip = {
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.base = S3C2410_GPK(0),
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.owner = THIS_MODULE,
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.label = "GPIOK",
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.ngpio = 16,
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},
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}, {
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.base = S3C2443_GPLCON,
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.pm = __gpio_pm(&s3c_gpio_pm_2bit),
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.chip = {
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.base = S3C2410_GPL(0),
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.owner = THIS_MODULE,
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.label = "GPIOL",
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.ngpio = 15,
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},
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}, {
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.base = S3C2443_GPMCON,
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.pm = __gpio_pm(&s3c_gpio_pm_2bit),
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.chip = {
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.base = S3C2410_GPM(0),
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.owner = THIS_MODULE,
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.label = "GPIOM",
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.ngpio = 2,
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},
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},
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};
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};
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static __init int s3c24xx_gpiolib_init(void)
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static __init int s3c24xx_gpiolib_init(void)
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{
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{
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struct s3c_gpio_chip *chip = s3c24xx_gpios;
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struct s3c_gpio_chip *chip = s3c24xx_gpios;
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