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ARM: SPEAr13xx: DT: Add spics gpio controller nodes 

SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
Cell spi controller through its system registers, which otherwise remains under
PL022 control which some protocols do not want.

This patch adds spics controller nodes in device tree for various SPEAr13xx
SoCs.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
This commit is contained in:
Shiraz Hashim 2012-09-03 11:46:58 +05:30 committed by Viresh Kumar
parent 53d74fd79d
commit 7cef07d5cd
2 changed files with 26 additions and 0 deletions
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12
arch/arm/boot/dts/spear1310.dtsi
View File

@ -17,6 +17,18 @@ / {
compatible = "st,spear1310";
ahb {
spics: spics@e0700000{
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x3b0>;
st-spics,sw-enable-bit = <12>;
st-spics,cs-value-bit = <11>;
st-spics,cs-enable-mask = <3>;
st-spics,cs-enable-shift = <8>;
gpio-controller;
#gpio-cells = <2>;
};
ahci@b1000000 {
compatible = "snps,spear-ahci";
reg = <0xb1000000 0x10000>;

14
arch/arm/boot/dts/spear1340.dtsi
View File

@ -17,6 +17,20 @@ / {
compatible = "st,spear1340";
ahb {
spics: spics@e0700000{
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x42c>;
st-spics,sw-enable-bit = <21>;
st-spics,cs-value-bit = <20>;
st-spics,cs-enable-mask = <3>;
st-spics,cs-enable-shift = <18>;
gpio-controller;
#gpio-cells = <2>;
status = "disabled";
};
ahci@b1000000 {
compatible = "snps,spear-ahci";
reg = <0xb1000000 0x10000>;